SN74LVCR162245_06 Datasheet, PDF (1/12 Pages) Texas Instruments – 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

www.ti.com
FEATURES
• Member of the Texas Instruments Widebus™
Family
• Operates From 2.7 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 8.5 ns at 3.3 V
• Typical V_OLP (Output Ground Bounce) < 0.8 V
at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) > 2 V at
V_CC = 3.3 V, T_A = 25°C
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• All Outputs Have Equivalent 26-Ω Series
Resistors, So No External Resistors Are
Required
• Latch-Up Performance Exceeds 250 mA Per
JEDEC Standard JESD-17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
DESCRIPTION/ORDERING INFORMATION
This 16-bit (dual-octal) noninverting bus transceiver is
designed for 2.7-V to 3.6-V V_CC operation.
The SN74LVCR162245 is designed for asynchronous
communication between data buses. The
control-function implementation minimizes external
timing requirements.
SN74LVCR162245
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES047E – AUGUST 1995 – REVISED MARCH 2005
DGG OR DL PACKAGE
(TOP VIEW)
1DIR 1
1B1 2
1B2 3
GND 4
1B3 5
1B4 6
V_CC 7
1B5 8
1B6 9
GND 10
1B7 11
1B8 12
2B1 13
2B2 14
GND 15
2B3 16
2B4 17
V_CC 18
2B5 19
2B6 20
GND 21
2B7 22
2B8 23
2DIR 24
48 1OE
47 1A1
46 1A2
45 GND
44 1A3
43 1A4
42 V_CC
41 1A5
40 1A6
39 GND
38 1A7
37 1A8
36 2A1
35 2A2
34 GND
33 2A3
32 2A4
31 V_CC
30 2A5
29 2A6
28 GND
27 2A7
26 2A8
25 2OE
This device can be used as two 8-bit transceivers or one 16-bit transceiver. It allows data transmission from the
A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR)
input. The output-enable (OE) input can be used to disable the device so that the buses effectively are isolated.
All outputs, which are designed to sink up to 12 mA, include 26-Ω resistors to reduce overshoot and undershoot.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup or
pulldown resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input
circuit and is not disabled by OE or DIR.
T_A
–40°C to 85°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER
TOP-SIDE MARKING
SSOP – DL
Tube
Tape and reel
SN74LVCR162245DL
SN74LVCR162245DLR
LVCR162245
TSSOP – DGG
Tape and reel
SN74LVCR162245DGGR
LVCR162245
VFBGA – GQL
VFBGA – ZQL (Pb-free)
Tape and reel
SN74LVCR162245KR
74LVCR162245ZQLR
LEP245
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1995–2005, Texas Instruments Incorporated