SN74LVCH32245A Datasheet, PDF (1/9 Pages) Texas Instruments – 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

D Member of the Texas Instruments
Widebus ™ Family
D EPIC™ (Enhanced-Performance Implanted
CMOS) Submicron Process
D Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
D Typical V_OHV (Output V_OH Undershoot)
> 2 V at V_CC = 3.3 V, T_A = 25°C
D I_off Supports Partial-Power-Down-Mode
Operation
D Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V V_CC)
SN74LVCH32245A
32-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS616A – OCTOBER 1998 – REVISED JUNE 1999
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D Packaged in Plastic Fine-Pitch Ball Grid
Array Package
description
This 32-bit (dual-octal) noninverting bus transceiver is designed for 1.65-V to 3.6-V V_CC operation.
The SN74LVCH32245A is designed for asynchronous communication between data buses. The
control-function implementation minimizes external timing requirements.
This device can be used as four 8-bit transceivers, two 16-bit transceivers, or one 32-bit transceiver. It allows
data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at
the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so that the
buses are effectively isolated.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74LVCH32245A is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 8-bit section)
INPUTS
OE DIR
OPERATION
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1999, Texas Instruments Incorporated
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