SN74LVCH16952A Datasheet, PDF (1/11 Pages) Texas Instruments – 16-BIT REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS

SN74LVCH16952A
16-BIT REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS320F – NOVEMBER 1993 – REVISED JUNE 1998
D Member of the Texas Instruments
Widebus ™ Family
D EPIC ™ (Enhanced-Performance Implanted
CMOS) Submicron Process
D Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
D Typical V_OHV (Output V_OH Undershoot)
> 2 V at V_CC = 3.3 V, T_A = 25°C
D Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V V_CC)
D Power Off Disables Outputs, Permitting
Live Insertion
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
description
This 16-bit registered transceiver is designed for
1.65-V to 3.6-V V_CC operation.
The SN74LVCH16952A contains two sets of
D-type flip-flops for temporary storage of data
flowing in either direction. It can be used as two
8-bit transceivers or one 16-bit transceiver. Data
on the A or B bus is stored in the registers on the
low-to-high transition of the clock (CLKAB or
CLKBA) input, provided that the clock-enable
(CEAB or CEBA) input is low. Taking the
output-enable (OEAB or OEBA) input low
accesses the data on either port.
DGG OR DL PACKAGE
(TOP VIEW)
1OEAB 1
1CLKAB 2
1CEAB 3
GND 4
1A1 5
1A2 6
V_CC 7
1A3 8
1A4 9
1A5 10
GND 11
1A6 12
1A7 13
1A8 14
2A1 15
2A2 16
2A3 17
GND 18
2A4 19
2A5 20
2A6 21
V_CC 22
2A7 23
2A8 24
GND 25
2CEAB 26
2CLKAB 27
2OEAB 28
56 1OEBA
55 1CLKBA
54 1CEBA
53 GND
52 1B1
51 1B2
50 V_CC
49 1B3
48 1B4
47 1B5
46 GND
45 1B6
44 1B7
43 1B8
42 2B1
41 2B2
40 2B3
39 GND
38 2B4
37 2B5
36 2B6
35 V_CC
34 2B7
33 2B8
32 GND
31 2CEBA
30 2CLKBA
29 2OEBA
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74LVCH16952A is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1998, Texas Instruments Incorporated
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