SN74LVCH16374A_04 Datasheet, PDF (1/13 Pages) Texas Instruments – 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

SN74LVCH16374A
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCAS565L – MARCH 1996 – REVISED SEPTEMBER 2003
D Member of the Texas Instruments
Widebus  Family
D Operates From 1.65 V to 3.6 V
D Inputs Accept Voltages to 5.5 V
D Max t_pd of 4.5 ns at 3.3 V
D Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
D Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
D I_off Supports Partial-Power-Down Mode
Operation
D Supports Mixed-Mode Signal Operation on
All Ports (5-V Input and Output Voltages
With 3.3-V V_CC )
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)
description/ordering information
This 16-bit edge-triggered D-type flip-flop is
designed for 1.65-V to 3.6-V V_CC operation.
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1OE ¹
1Q1 ²
1Q2 ³
GND ⁴
1Q3 ⁵
1Q4 ⁶
V_CC ⁷
1Q5 ⁸
1Q6 ⁹
GND ¹⁰
1Q7 ¹¹
1Q8 ¹²
2Q1 ¹³
2Q2 ¹⁴
GND ¹⁵
2Q3 ¹⁶
2Q4 ¹⁷
V_CC ¹⁸
2Q5 ¹⁹
2Q6 ²⁰
GND ²¹
2Q7 ²²
2Q8 ²³
2OE ²⁴
48 _1CLK
47 _1D1
46 _1D2
45 _GND
44 _1D3
43 _1D4
42 _VCC
41 _1D5
40 _1D6
39 _GND
38 _1D7
37 _1D8
36 _2D1
35 _2D2
34 _GND
33 _2D3
32 _2D4
31 _VCC
30 _2D5
29 _2D6
28 _GND
27 _2D7
26 _2D8
25 _2CLK
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without interface or pullup components.
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while
the outputs are in the high-impedance state.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SSOP – DL
Tube
Tape and reel
SN74LVCH16374ADL
SN74LVCH16374ADLR
LVCH16374A
TSSOP – DGG
–40°C to 85°C
TVSOP – DGV
Tape and reel
Tape and reel
SN74LVCH16374ADGGR
SN74LVCH16374ADGVR
LVCH16374A
LDH374A
VFBGA – GQL
Tape and reel
VFBGA – ZQL (Pb-free)
SN74LVCH16374AGQLR
SN74LVCH16374AZQLR
LDH374A
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are}
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2003, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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