SN74LVCH16245A_06 Datasheet, PDF (1/17 Pages) Texas Instruments – 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

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FEATURES
• Member of the Texas Instruments Widebus™
Family
• Operates From 1.65 V to 3.6 V
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 4 ns at 3.3 V
• Typical V_OLP (Output Ground Bounce) <0.8 V
at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) >2 V at
V_CC = 3.3 V, T_A = 25°C
• Supports Mixed-Mode Signal Operation on All
Ports (5-V Input/Output Voltage With
3.3-V V_CC)
• I_off Supports Partial-Power-Down Mode
Operation
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
DESCRIPTION/ORDERING
INFORMATION
This 16-bit (dual-octal) noninverting bus transceiver
is designed for 1.65-V to 3.6-V V_CC operation.
SN74LVCH16245A
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES495B – OCTOBER 2003 – REVISED AUGUST 2006
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1DIR ¹
1B1 ²
1B2 ³
GND ⁴
1B3 ⁵
1B4 ⁶
V_CC ⁷
1B5 ⁸
1B6 ⁹
GND ¹⁰
1B7 ¹¹
1B8 ¹²
2B1 ¹³
2B2 ¹⁴
GND ¹⁵
2B3 ¹⁶
2B4 ¹⁷
V_CC ¹⁸
2B5 ¹⁹
2B6 ²⁰
GND ²¹
2B7 ²²
2B8 ²³
2DIR ²⁴
48 1OE
47 1A1
46 _1A2
45 GND
44 1A3
43 1A4
42 V_CC
41 _1A5
40 _1A6
39 _GND
38 1A7
37 1A8
36 2A1
35 _2A2
34 _GND
33 _2A3
32 _2A4
31 V_CC
30 _2A5
29 _2A6
28 _GND
27 _2A7
26 _2A8
25 _2OE
This device can be used as two 8-bit transceivers or one 16-bit transceiver.
The SN74LVCH16245A is designed for asynchronous communication between data buses. The logic levels of
the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port
outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to
the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are
activated. The input circuitry on both A and B ports always is active and must have a logic HIGH or LOW level
applied to prevent excess I_CC and I_CCZ.
Active bus-hold circuitry holds unused or undriven data inputs at a valid logic state. Use of pullup or pulldown
resistors with the bus-hold circuitry is not recommended. The bus-hold circuitry is part of the input circuit and is
not disabled by OE or DIR.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2006, Texas Instruments Incorporated