SN74LVCE161284_07 Datasheet, PDF (1/16 Pages) Texas Instruments – 19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER WITH ERROR-FREE POWER UP

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SN74LVCE161284
19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER
WITH ERROR-FREE POWER UP
SCES541 – JANUARY 2004 – REVISED MARCH 2005
FEATURES
• Auto-Power-Up Feature Prevents Printer
Errors When Printer Is Turned On, But No
Valid Signal Is at A9–A13 Pins
• 1.4-kΩ Pullup Resistors Integrated on All
Open-Drain Outputs Eliminate the Need for
Discrete Resistors
• Designed for IEEE Std 1284-I (Level-1 Type)
and IEEE Std 1284-II (Level-2 Type) Electrical
Specifications
• Flow-Through Architecture Optimizes PCB
Layout
• I_off and Power-Up 3-State Support Hot
Insertion
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection
– ±4 kV – Human-Body Model
– ±8 kV – IEC 61000-4-2, Contact Discharge
(Connector Pins)
– ±15 kV – IEC 61000-4-2, Air-Gap Discharge
(Connector Pins)
– ±15 kV – Human-Body Model
(Connector Pins)
DGG OR DL PACKAGE
(TOP VIEW)
HD 1
A9 2
A10 3
A11 4
A12 5
A13 6
V_CC 7
A1 8
A2 9
GND 10
A3 11
A4 12
A5 13
A6 14
GND 15
A7 16
A8 17
V_CC 18
PERI LOGIC IN 19
A14 20
A15 21
A16 22
A17 23
HOST LOGIC OUT 24
48 DIR
47 Y9
46 Y10
45 Y11
44 Y12
43 Y13
42 V_CC CABLE
41 B1
40 B2
39 GND
38 B3
37 B4
36 B5
35 B6
34 GND
33 B7
32 B8
31 V_CC CABLE
30 PERI LOGIC OUT
29 C14
28 C15
27 C16
26 C17
25 HOST LOGIC IN
DESCRIPTION/ORDERING INFORMATION
The SN74LVCE161284 is designed for 3-V to 3.6-V V_CC operation. This device provides asynchronous two-way
communication between data buses. The control-function implementation minimizes external timing
requirements.
This device has eight bidirectional bits; data can flow in the A-to-B direction when the direction-control input (DIR)
is high and in the B-to-A direction when DIR is low. This device also has five drivers that drive the cable side and
four receivers. The SN74LVCE161284 has one receiver dedicated to the HOST LOGIC line and a driver to drive
the PERI LOGIC line.
T_A
0°C to 70°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER
SSOP – DL
Tube
Tape and reel
SN74LVCE161284DL
SN74LVCE161284DLR
TSSOP – DGG Tape and reel
SN74LVCE161284DGGR
TOP-SIDE MARKING
LVCE161284
LVCE161284
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2005, Texas Instruments Incorporated