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SN74LVC74 Datasheet, PDF (1/6 Pages) Texas Instruments – DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET
SN74LVC74
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
SCAS287B – JANUARY 1993 – REVISED JULY 1995
D EPIC ™ (Enhanced-Performance Implanted
CMOS) Submicron Process
D ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model
(C = 200 pF, R = 0)
D Latch-Up Performance Exceeds 250 mA
Per JEDEC Standard JESD-17
D Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 3.3 V, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
> 2 V at VCC = 3.3 V, TA = 25°C
D Inputs Accept Voltages to 5.5 V
D Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages
D, DB, OR PW PACKAGE
(TOP VIEW)
1CLR 1
1D 2
1CLK 3
1PRE 4
1Q 5
1Q 6
GND 7
14 VCC
13 2CLR
12 2D
11 2CLK
10 2PRE
9 2Q
8 2Q
description
This dual positive-edge-triggered D-type flip-flop is designed for 2.7-V to 3.6-V VCC operation.
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs regardless of the levels of the
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs
at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval,
data at the D input may be changed without affecting the levels at the outputs.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
The SN74LVC74 is characterized for operation from – 40°C to 85°C.
FUNCTION TABLE
INPUTS
OUTPUTS
PRE CLR CLK D
Q
Q
L
H
X
X
H
L
H
L
X
X
L
H
L
L
X
X
H† H†
H
H
↑
H
H
L
H
H
↑
L
L
H
H
H
L
X
Q0 Q0
† This configuration is nonstable; that is, it does not
persist when PRE or CLR returns to its inactive
(high) level.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1995, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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