SN74LVC574 Datasheet, PDF (1/5 Pages) Texas Instruments – OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS

SN74LVC574
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCAS301 – JANUARY 1993 – REVISED MARCH 1994
• EPIC ™ (Enhanced-Performance Implanted
CMOS) Submicron Process
• Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
> 2 V at V_CC = 3.3 V, T_A = 25°C
• Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages
description
DB, DW, OR PW PACKAGE
(TOP VIEW)
OE ₁
1D ₂
2D 3
3D 4
4D 5
5D 6
6D 7
7D 8
8D 9
GND 10
20 ^V_CC
19 ^1Q
18 2Q
17 3Q
16 4Q
15 5Q
14 6Q
13 7Q
12 8Q
11 CLK
This octal edge-triggered D-type flip-flop is
designed for 2.7-V to 3.6-V V_CC operation.
The SN74LVC574 features 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus
drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels that were set up at
the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus
lines without need for interface or pullup components.
The output-enable (OE) input does not affect the internal operations of the flip-flops. Old data can be retained
or new data can be entered while the outputs are in the high-impedance state.
The SN74LVC574 is characterized for operation from – 40°C to 85°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OE CLK D
OUTPUT
Q
L
↑
H
H
L
↑
L
L
L
L
X
Q0
H
X
X
Z
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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Copyright © 1994, Texas Instruments Incorporated
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