SN74LVC2T45_07 Datasheet, PDF (1/23 Pages) Texas Instruments – DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

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SN74LVC2T45
DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES516I – DECEMBER 2003 – REVISED MARCH 2007
FEATURES
• Available in the Texas Instruments
NanoFree™ Package
• Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.65-V to
5.5-V Power-Supply Range
• V_CC Isolation Feature – If Either V_CC Input Is at
GND, Both Ports Are in the High-Impedance
State
• DIR Input Circuit Referenced to V_CCA
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• I_off Supports Partial-Power-Down Mode
Operation
• Max Data Rates
– 420 Mbps (3.3-V to 5-V Translation)
– 210 Mbps (Translate to 3.3 V)
– 140 Mbps (Translate to 2.5 V)
– 75 Mbps (Translate to 1.8 V)
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 4000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DCT OR DCU PACKAGE
(TOP VIEW)
V_CCA 1
A1 2
A2 3
GND 4
8 V_CCB
7 B1
6 B2
5 DIR
YZP PACKAGE
(BOTTOM VIEW)
GND
A2
A1
V_CCA
D1 _{4 5} D2
C1 3 6 C2
B1 2 7 B2
A1 _{1 8} A2
DIR
B2
B1
V_CCB
DESCRIPTION/ORDERING INFORMATION
This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is
designed to track V_CCA. V_CCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track
V_CCB. V_CCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional
translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
T_A
–40°C to 85°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER
NanoFree – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
Reel of 3000
SN74LVC2T45YZPR
SSOP – DCT
Reel of 3000
Reel of 250
SN74LVC2T45DCTR
SN74LVC2T45DCTT
VSSOP – DCU
Reel of 3000
Reel of 250
SN74LVC2T45DCUR
SN74LVC2T45DCUT
TOP-SIDE MARKING⁽²⁾
_ _ _TB_
CT2_ _ _
CT2_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2007, Texas Instruments Incorporated