SN74LVC2G86 Datasheet, PDF (1/14 Pages) Texas Instruments – Dual 2-Input Exclusive-OR Gate

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FEATURES
• Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 4.7 ns at 3.3 V
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• Typical V_OLP (Output Ground Bounce) <0.8 V
at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) >2 V at
V_CC = 3.3 V, T_A = 25°C
• I_off Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN74LVC2G86
DUAL 2-INPUT EXCLUSIVE-OR GATE
SCES360F – AUGUST 2001 – REVISED MAY 2005
DCT OR DCU PACKAGE
(TOP VIEW)
1A 1
1B 2
2Y 3
GND 4
8 V_CC
7 1Y
6 2B
5 2A
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
GND 4 5 2A
2Y 3 6 2B
1B 2 7 1Y
1A 1 8 V_CC
DESCRIPTION/ORDERING INFORMATION
This dual 2-input exclusive-OR gate is designed for 1.65-V to 5.5-V V_CC operation.
The SN74LVC2G86 performs the Boolean function Y = A ⊕ B or Y = AB + AB in positive logic.
T_A
–40°C to 85°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER
NanoStar™ – WCSP (DSBGA)
0.17-mm Small Bump – YEA
SN74LVC2G86YEAR
NanoFree™ – WCSP (DSBGA)
0.17-mm Small Bump – YZA (Pb-free)
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
Reel of 3000
SN74LVC2G86YZAR
SN74LVC2G86YEPR
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SN74LVC2G86YZPR
SSOP – DCT
Reel of 3000 SN74LVC2G86DCTR
VSSOP – DCU
Reel of 3000 SN74LVC2G86DCUR
Reel of 250 SN74LVC2G86DCUT
TOP-SIDE MARKING⁽²⁾
_ _ _CH_
C86_ _ _
C86_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2001–2005, Texas Instruments Incorporated