SN74LVC2G32 Datasheet, PDF (1/12 Pages) Texas Instruments – DUAL 2 INPUT POSITIVE-OR GATE

SN74LVC2G32
DUAL 2ĆINPUT POSITIVEĆOR GATE
D Available in the Texas Instruments
NanoStar and NanoFree Packages
D Supports 5-V V_CC Operation
D Inputs Accept Voltages to 5.5 V
D Max t_pd of 3.8 ns at 3.3 V
D Low Power Consumption, 10-µA Max I_CC
D ±24-mA Output Drive at 3.3 V
D Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
D Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
D I_off Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
SCES201J − APRIL 1999 − REVISED SEPTEMBER 2003
DCT OR DCU PACKAGE
(TOP VIEW)
1A 1
1B 2
2Y 3
GND 4
8 V_CC
7 1Y
6 2B
5 2A
YEA, YEP, YZA OR YZP PACKAGE
(BOTTOM VIEW)
GND 4 5 2A
2Y 3 6 2B
1B 2 7 1Y
1A 1 8 V_CC
description/ordering information
This dual 2-input positive-OR gate is designed for 1.65-V to 5.5-V V_CC operation.
The SN74LVC2G32 performs the Boolean function Y + A ) B or Y + A • B in positive logic.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
NanoStar − WCSP (DSBGA)
0.17-mm Small Bump − YEA
SN74LVC2G32YEAR
−40°C to 85°C
NanoFree − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
Reel of 3000
SN74LVC2G32YZAR
SN74LVC2G32YEPR
SN74LVC2G32YZPR
_ _ _CG_
SSOP − DCT
Reel of 3000 SN74LVC2G32DCTR C32_ _ _
VSSOP − DCU
Reel of 3000
Reel of 250
SN74LVC2G32DCUR
SN74LVC2G32DCUT
C32_
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at}
www.ti.com/sc/package.
‡ _{DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.}
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2003, Texas Instruments Incorporated
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