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SN74LVC2G17-Q1 Datasheet, PDF (1/7 Pages) Texas Instruments – DUAL SCHMITT-TRIGGER BUFFER
SN74LVC2G17ĆQ1
DUAL SCHMITTĆTRIGGER BUFFER
D Qualification in Accordance With
AEC-Q100†
D Qualified for Automotive Applications
D Customer-Specific Configuration Control
Can Be Supported Along With
Major-Change Approval
D Supports 5-V VCC Operation
D Inputs Accept Voltages to 5.5 V
D Max tpd of 5.4 ns at 3.3 V
D Low Power Consumption, 10-µA Max ICC
D ±24-mA Output Drive at 3.3 V
D Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
† Contact factory for details. Q100 qualification data available on
request.
SCES618 − OCTOBER 2004
D Ioff Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 1000-V Charged-Device Model (C101)
DBV OR DCK PACKAGE
(TOP VIEW)
1A 1
GND 2
2A 3
6 1Y
5 VCC
4 2Y
description/ordering information
This dual Schmitt-trigger buffer is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC2G17 contains two buffers and performs the Boolean function Y = A. The device functions as two
independent buffers, but because of Schmitt action, it may have different input threshold levels for positive-going
(VT+) and negative-going (VT−) signals.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
−40°C to 125°C
SOT (SOT-23) − DBV
SOT (SC-70) − DCK
Reel of 3000
Reel of 3000
SN74LVC2G17QDBVRQ1
SN74LVC2G17QDCKRQ1
C17_
C7_
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
(each inverter)
INPUT OUTPUT
A
Y
H
H
L
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2004, Texas Instruments Incorporated
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