SN74LVC2G14_08 Datasheet, PDF (1/14 Pages) Texas Instruments – DUAL SCHMITT-TRIGGER INVERTER

www.ti.com
FEATURES
• Available in the Texas Instruments
NanoFree™ Package
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 5.4 ns at 3.3 V
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
DBV PACKAGE
(TOP VIEW)
1A
1
6
1Y
GND
2
5
V_CC
SN74LVC2G14
DUAL SCHMITT-TRIGGER INVERTER
SCES200L – APRIL 1999 – REVISED JANUARY 2007
• Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
• I_off Feature Supports Partial-Power-Down
Mode Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)
DCK PACKAGE
(TOP VIEW)
1A
1
6 1Y
GND
2
5
V_CC
2A
3
4 2Y
YZP PACKAGE
(BOTTOM VIEW)
2A ^{3 4} 2Y
GND ^{2 5 V}CC
1A ^{1 6} 1Y
2A
3
4
2Y
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This dual Schmitt-trigger inverter is designed for 1.65-V to 5.5-V V_CC operation.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
The SN74LVC2G14 contains two inverters and performs the Boolean function Y = A. The device functions as
two independent inverters, but because of Schmitt action, it may have different input threshold levels for
positive-going (V_T+) and negative-going (V_T–) signals.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
T_A
–40°C to 85°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER TOP-SIDE MARKING⁽²⁾
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
Reel of 3000
SN74LVC2G14YZPR
_ _ _CF_
SOT (SOT-23) – DBV
Reel of 3000
Reel of 250
SN74LVC2G14DBVR
SN74LVC2G14DBVT
C14_
SOT (SC-70) – DCK
Reel of 3000 SN74LVC2G14DCKR
CF_
Reel of 250
SN74LVC2G14DCKT
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2007, Texas Instruments Incorporated