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SN74LVC2G125 Datasheet, PDF (1/13 Pages) Texas Instruments – DUAL BUS BUFFER GATE WITH 3 STATE OUTPUTS
www.ti.com
FEATURES
• Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
• Supports 5-V VCC Operation
• Inputs Accept Voltages to 5.5 V
• Max tpd of 4.3 ns at 3.3 V
• Low Power Consumption, 10-µA Max ICC
• ±24-mA Output Drive at 3.3 V
• Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
• Ioff Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN74LVC2G125
DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SCES204K – APRIL 1999 – REVISED JUNE 2005
DCT OR DCU PACKAGE
(TOP VIEW)
1OE 1
1A 2
2Y 3
GND 4
8 VCC
7 2OE
6 1Y
5 2A
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
GND 4 5 2A
2Y 3 6 1Y
1A 2 7 2OE
1OE 1 8 VCC
DESCRIPTION/ORDERING INFORMATION
The SN74LVC2G125 is a dual bus buffer gate, designed for 1.65-V to 5.5-V VCC operation. This device features
dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE) input is
high.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
TA
PACKAGE (1)
NanoStar™ – WCSP (DSBGA)
0.17-mm Small Bump – YEA
ORDERABLE PART NUMBER TOP-SIDE MARKING(2)
SN74LVC2G125YEAR
–40°C to 85°C
NanoFree™ – WCSP (DSBGA)
0.17-mm Small Bump – YZA (Pb-free)
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
Reel of 3000
SN74LVC2G125YZAR
SN74LVC2G125YEPR
SN74LVC2G125YZPR
_ _ _CM_
SSOP – DCT
Reel of 3000 SN74LVC2G125DCTR
C25_ _ _
VSSOP – DCU
Reel of 3000
Reel of 250
SN74LVC2G125DCUR
SN74LVC2G125DCUT
C25_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2005, Texas Instruments Incorporated