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SN74LVC2G125-Q1 Datasheet, PDF (1/8 Pages) Texas Instruments – DUAL BUS BUFFER GATE WITH 3-STATE OUTPUTS
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SN74LVC2G125-Q1
DUAL BUS BUFFER GATE
WITH 3-STATE OUTPUTS
SCES559B – MARCH 2004 – REVISED OCTOBER 2007
FEATURES
1
• Qualified for Automotive Applications
• Supports 5-V VCC Operation
• Inputs Accept Voltages to 5.5 V
• Max tpd of 4.3 ns at 3.3 V
• Low Power Consumption, 10-μA Max ICC
• ±24-mA Output Drive at 3.3 V
• Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
• Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
• Ioff Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DCT OR DCU PACKAGE
(TOP VIEW)
1OE 1
1A 2
2Y 3
GND 4
8 VCC
7 2OE
6 1Y
5 2A
DESCRIPTION/ORDERING INFORMATION
The SN74LVC2G125-Q1 is a dual bus buffer gate designed for 1.65-V to 5.5-V VCC operation. This device
features dual line drivers with 3-state outputs. The outputs are disabled when the associated output-enable (OE)
input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
TA
–40°C to 85°C
SSOP – DCT
VSSOP – DCU
ORDERING INFORMATION(1)
PACKAGE (2)
ORDERABLE PART NUMBER
Tape and reel
Tape and reel
CLVC2G125IDCTRQ1
CLVC2G125IDCURQ1 (4)
TOP-SIDE MARKING(3)
C25_ _ _
C25_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
(4) Product preview
FUNCTION TABLE
(EACH BUFFER)
INPUTS
OE
A
L
H
L
L
H
X
OUTPUT
Y
H
L
Z
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains
PRODUCTION DATA information current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2007, Texas Instruments Incorporated