SN74LVC2G06-Q1 Datasheet, PDF (1/7 Pages) Texas Instruments – DUAL INVERTER BUFFER/DRIVER WITH OPEN DRAIN OUTPUTS

D Qualification in Accordance With
AEC-Q100^†
D Qualified for Automotive Applications
D Customer-Specific Configuration Control
Can Be Supported Along With
Major-Change Approval
D Supports 5-V V_CC Operation
D Max t_pd of 3.4 ns at 3.3 V
D Low Power Consumption, 10-µA Max I_CC
D ±24-mA Output Drive at 3.3 V
D Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
D Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
† _{Contact factory for details. Q100 qualification data available on}
request.
SN74LVC2G06ĆQ1
DUAL INVERTER BUFFER/DRIVER
WITH OPENĆDRAIN OUTPUTS
SCES617 − OCTOBER 2004
D Inputs and Open-Drain Outputs Accept
Voltages Up To 5.5 V
D I_off Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
DBV OR DCK PACKAGE
(TOP VIEW)
1A 1
GND 2
2A 3
6 1Y
5 V_CC
4 2Y
description/ordering information
This dual inverter buffer/driver is designed for 1.65-V to 5.5-V V_CC operation.
The output of the SN74LVC2G06 device is open drain and can be connected to other open-drain outputs to
implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
−40°C to 125°C
SOT (SOT-23) − DBV
SOT (SC-70) − DCK
Tape and reel SN74LVC2G06QDBVRQ1 C06_
Tape and reel SN74LVC2G06QDCKRQ1 CT_
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at}
www.ti.com/sc/package.
‡ _{DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.}
Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
(each inverter)
INPUT OUTPUT
A
Y
H
L
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2004, Texas Instruments Incorporated
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