SN74LVC1T45_09 Datasheet, PDF (1/25 Pages) Texas Instruments – SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

SN74LVC1T45
www.ti.com ..................................................................................................................................................... SCES515I – DECEMBER 2003 – REVISED MAY 2009
SINGLE-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
FEATURES
1
•2 Available in the Texas Instruments NanoFree™
Package
• Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.65-V to
5.5-V Power-Supply Range
• V_CC Isolation Feature – If Either V_CC Input Is at
GND, Both Ports Are in the High-Impedance
State
• DIR Input Circuit Referenced to V_CCA
• Low Power Consumption, 4-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• I_off Supports Partial-Power-Down Mode
Operation
• Max Data Rates
– 420 Mbps (3.3-V to 5-V Translation)
– 210 Mbps (Translate to 3.3 V)
– 140 Mbps (Translate to 2.5 V)
– 75 Mbps (Translate to 1.8 V)
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
V_CCA
GND
DBV PACKAGE
(TOP VIEW)
1
6
2
5
DCK PACKAGE
(TOP VIEW)
V_CCB ^VCCA
1
6
V_CCB
GND
2
5 DIR
DIR
A
3
4B
DRL PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOM VIEW)
V_CCA 1
GND 2
A3
6 V_CCB
A B ^{C1 3 4 C2}
5 DIR
GND ^B1 2 5 ^B2 DIR
4B
V_CCA ^{A1 1 6 A2} V_CCB
A
3
4
B
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This single-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is
designed to track V_CCA. V_CCA accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track
V_CCB. V_CCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional
translation between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.
The SN74LVC1T45 is designed for asynchronous communication between two data buses. The logic levels of
the direction-control (DIR) input activate either the B-port outputs or the A-port outputs. The device transmits data
from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the
A-port outputs are activated. The input circuitry on both A and B ports always is active and must have a logic
HIGH or LOW level applied to prevent excess I_CC and I_CCZ.
The SN74LVC1T45 is designed so that the DIR input is powered by V_CCA.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The V_CC isolation feature ensures that if either V_CC input is at GND, then both ports are in the high-impedance
state.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2009, Texas Instruments Incorporated