SN74LVC1G97 Datasheet, PDF (1/17 Pages) Texas Instruments – CONFIGURABLE MULTIPLE-FUNCTION GATE

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SN74LVC1G97
CONFIGURABLE MULTIPLE-FUNCTION GATE
SCES416I – DECEMBER 2002 – REVISED MARCH 2006
FEATURES
• Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 6.3 ns at 3.3 V
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• I_off Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
• Choose From Nine Specific Logic Functions
DBV PACKAGE
(TOP VIEW)
In1
1
6
GND
2
5
In2
V_CC
DCK PACKAGE
(TOP VIEW)
In1
1
6 In2
GND
2
5
V_CC
In0
3
4Y
DRL PACKAGE
(TOP VIEW)
In1 1
GND 2
In0 3
6 In2
5 V_CC
4Y
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOM VIEW)
In0 ^{3 4} Y
GND ^{2 5 V}CC
In1 ^{1 6} In2
In0
3
4
Y
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This configurable multiple-function gate is designed for 1.65-V to 5.5-V V_CC operation.
The SN74LVC1G97 features configurable multiple functions. The output state is determined by eight patterns of
3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. All
inputs can be connected to V_CC or GND.
T_A
–40°C to 85°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER TOP-SIDE MARKING⁽²⁾
NanoStar™ – WCSP (DSBGA)
0.17-mm Small Bump – YEA
SN74LVC1G97YEAR
NanoFree™ – WCSP (DSBGA)
0.17-mm Small Bump – YZA (Pb-free)
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
Tape and reel
SN74LVC1G97YZAR
SN74LVC1G97YEPR
_ _ _CS_
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SN74LVC1G97YZPR
SOT (SOT-23) – DBV
Tape and reel SN74LVC1G97DBVR
C97_
SOT (SC-70) – DCK
Tape and reel SN74LVC1G97DCKR
CS_
SOT (SOT-563) – DRL
Reel of 4000 SN74LVC1G97DRLR
CS_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA,YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, ⋅ = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2006, Texas Instruments Incorporated