SN74LVC1G79 Datasheet, PDF (1/14 Pages) Texas Instruments – SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP

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FEATURES
SN74LVC1G79
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SCES220R – APRIL 1999 – REVISED JANUARY 2007
• Available in the Texas Instruments
NanoFree™ Package
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 4 ns at 3.3 V
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• I_off Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D
CLK
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOM VIEW)
1
2
5
V_CC
D
CLK
1
2
5
V_CC
D1
5 V_CC
GND ^{3 4} Q
CLK 2
CLK ²
GND 3 4 Q
D ^{1 5 V}_CC
GND
3
4
Q
GND
3
4
Q
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V V_CC operation.
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the
positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the
rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without
affecting the level at the output.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
T_A
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP
(Pb-free)
Reel of 3000 SN74LVC1G79YZPR
–40°C to 85°C ^{SOT (SOT-23) – DBV}
Reel of 3000
Reel of 250
SN74LVC1G79DBVR
SN74LVC1G79DBVT
SOT (SC-70) – DCK
Reel of 3000
Reel of 250
SN74LVC1G79DCKR
SN74LVC1G79DCKT
SOT (DOT-553) – DRL
Reel of 4000 SN74LVC1G79DRLR
TOP-SIDE MARKING⁽²⁾
_ _ _CR_
C79_
CU_
CR_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2007, Texas Instruments Incorporated