SN74LVC1G74DQER Datasheet, PDF (1/21 Pages) Texas Instruments – Available in the Texas Instruments NanoFree™ Package

SN74LVC1G74
www.ti.com
SCES794C – SEPTEMBER 2009 – REVISED NOVEMBER 2012
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
Check for Samples: SN74LVC1G74
FEATURES
1
•2 Available in the Texas Instruments NanoFree™
Package
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 5.9 ns at 3.3 V
• Low Power Consumption, 10-μA Max I_CC
• ±24-mA Output Drive at 3.3 V
• Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
• I_off Supports Live Insertion, Partial Power
Down Mode, and Back Drive Protection
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
CLK
D
Q
DCT PACKAGE
(TOP VIEW)
1
8
2
7
3
6
V_CC
PRE
CLR
CLK
D
Q
GND
DCU PACKAGE
(TOP VIEW)
1
8
V_CC
2
7 PRE
3
6 CLR
4
5Q
YZP PACKAGE
(TOP VIEW)
CLK ^{A1 1 8 A2}
D ^{B1 2 7 B2}
Q ^{C1 3 6 C2}
GND ^{D1 4 5 D2}
V_CC
PRE
CLR
Q
GND
4
5
Q
See mechanical drawings for dimensions.
DQE PACKAGE
(TOP VIEW)
CLK ^{1 8 V}CC
D ^{2 7} PRE
Q ^{3 6} CLR
GND ^{4 5} Q
RSE PACKAGE
(TOP VIEW)
V_CC
8
PRE ¹
7 _CLK
CLR ²
6_D
Q ³ ₄ ⁵Q
GND
DESCRIPTION/ORDERING INFORMATION
This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V V_CC operation.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs
at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval,
data at the D input can be changed without affecting the levels at the outputs.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2012, Texas Instruments Incorporated