SN74LVC1G57 Datasheet, PDF (1/14 Pages) Texas Instruments – CONFIGURABLE MULTIPLE FUNCTION GATE

SN74LVC1G57
CONFIGURABLE MULTIPLEĆFUNCTION GATE
D Available in the Texas Instruments
NanoStar and NanoFree Packages
D Supports 5-V V_CC Operation
D Inputs Accept Voltages to 5.5 V
D Max t_pd of 6.3 ns at 3.3 V
D Low Power Consumption, 10-µA Max I_CC
D ±24-mA Output Drive at 3.3 V
D I_off Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
SCES414G − NOVEMBER 2002 − REVISED SEPTEMBER 2003
DBV OR DCK PACKAGE
(TOP VIEW)
In1 1
GND 2
In0 3
6 In2
5 V_CC
4Y
YEA, YEP, YZA OR YZP PACKAGE
(BOTTOM VIEW)
In0 3 4 Y
GND 2 5 V_CC
In1 1 6 In2
description/ordering information
This configurable multiple-function gate is designed for 1.65-V to 5.5-V V_CC operation.
The SN74LVC1G57 features configurable multiple functions. The output state is determined by eight patterns
of 3-bit input. The user can choose the logic functions AND, OR, NAND, NOR, XNOR, inverter, and noninverter.
All inputs can be connected to V_CC or GND.
This device functions as an independent gate, but because of Schmitt action, it may have different input
threshold levels for positive-going (V_T+) and negative-going (V_T−) signals.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
NanoStar − WCSP (DSBGA)
0.17-mm Small Bump − YEA
SN74LVC1G57YEAR
−40°C to 85°C
NanoFree − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
Tape and reel
SN74LVC1G57YZAR
SN74LVC1G57YEPR
_ _ _CL_
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
SN74LVC1G57YZPR
SOT (SOT-23) − DBV
Tape and reel SN74LVC1G57DBVR CA7_
SOT (SC-70) − DCK
Tape and reel SN74LVC1G57DCKR CL_
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at}
www.ti.com/sc/package.
‡ _{DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.}
YEA/YZA,YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code,
and one following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2003, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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