SN74LVC1G27 Datasheet, PDF (1/12 Pages) Texas Instruments – SINGLE 3-INPUT POSITIVE-NOR GATE

www.ti.com
FEATURES
• Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 4.5 ns at 3.3 V
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• I_off Supports Partial-Power-Down Mode
Operation
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN74LVC1G27
SINGLE 3-INPUT POSITIVE-NOR GATE
SCES488B – SEPTEMBER 2003 – REVISED MARCH 2005
DBV OR DCK PACKAGE
(TOP VIEW)
A¹
GND ²
B³
6C
5 V_CC
4Y
YEP OR YZP PACKAGE
(BOTTOM VIEW)
B 34 Y
GND 2 5 V_CC
A 16 C
DESCRIPTION/ORDERING INFORMATION
The SN74LVC1G27 performs the Boolean function Y = A + B + C or Y = A ⋅ B ⋅ C in positive logic.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
T_A
–40°C to 85°C
PACKAGE ⁽¹⁾
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP
(Pb-free)
Tape and reel
ORDERABLE PART NUMBER
SN74LVC1G27YEPR
SN74LVC1G27YZPR
SOT (SOT-23) – DBV
Tape and reel SN74LVC1G27DBVR
SOT (SC-70) – DCK
Tape and reel SN74LVC1G27DCKR
TOP-SIDE MARKING⁽²⁾
_ _ _CU_
C27_
CU_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, ⋅ = Pb-free).
FUNCTION TABLE
INPUTS
A
B
C
H
X
X
X
H
X
X
X
H
L
L
L
OUTPUT
Y
L
L
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2005, Texas Instruments Incorporated