SN74LVC1G175 Datasheet, PDF (1/12 Pages) Texas Instruments – SINGLE D-TYPE DFLIP FLOP WITH ASYNCHRONOUS CLEAR

D Available in the Texas Instruments
NanoStar and NanoFree Packages
D Supports 5-V V_CC Operation
D Inputs Accept Voltages to 5.5 V
D Max t_pd of 4.3 ns at 3.3 V
D Low Power Consumption, 10-µA Max I_CC
D ±24-mA Output Drive at 3.3 V
D I_off Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
SN74LVC1G175
SINGLE DĆTYPE FLIPĆFLOP
WITH ASYNCHRONOUS CLEAR
SCES560A − MARCH 2004 − REVISED AUGUST 2004
DBV OR DCK PACKAGE
(TOP VIEW)
CLK 1
GND 2
D3
6 CLR
5 V_CC
4Q
YEP OR YZP PACKAGE
(BOTTOM VIEW)
D 34 Q
GND 2 5 V_CC
CLK 1 6 CLR
description/ordering information
This single D-type flip-flop is designed for 1.65-V to 5.5-V V_CC operation.
The SN74LVC1G175 has an asynchronous clear (CLR) input. When CLR is high, data from the input pin (D)
is transferred to the output pin (Q) on the clock’s (CLK) rising edge. When CLR is low, Q is forced into the low
state, regardless of the clock edge or data on D.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
−40°C to 85°C
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
SOT (SOT-23) − DBV
Reel of 3000
Reel of 3000
Reel of 250
SN74LVC1G175YEPR
SN74LVC1G175YZPR
SN74LVC1G175DBVR
SN74LVC1G175DBVT
_ _ _D6_
C75_
SOT (SC-70) − DCK
Reel of 3000 SN74LVC1G175DCKR
D6_
Reel of 250 SN74LVC1G175DCKT
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at}
www.ti.com/sc/package.
‡ _{DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.}
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2004, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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