SN74LVC1G139_08 Datasheet, PDF (1/15 Pages) Texas Instruments – 2-TO-4 LINE DECODER

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FEATURES
• Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
• Supports 5-V V_CC Operation
• Inputs Accept Voltages to 5.5 V
• Max t_pd of 4.9 ns at 3.3 V
• Low Power Consumption, 10-µA Max I_CC
• ±24-mA Output Drive at 3.3 V
• I_off Supports Partial-Power-Down Mode
Operation
DCT PACKAGE
(TOP VIEW)
A
1
B
2
Y3
3
GND
4
8
V_CC
7
Y0
6
Y1
5
Y2
A
B
Y3
GND
SN74LVC1G139
2-TO-4 LINE DECODER
SCES602B – AUGUST 2004 – REVISED DECEMBER 2005
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
abc
DCU PACKAGE
(TOP VIEW)
1
8
V_CC
2
7 Y0
3
6 Y1
4
5 Y2
YEP OR YZP PACKAGE
(BOTTOM VIEW)
GND 4 5 Y2
Y3 ^{3 6} Y1
B ² 7 Y0
A
18
V_CC
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This 2-to-4 line decoder is designed for 1.65-V to 5.5-V V_CC operation.
The SN74LVC1G139 2-line to 4-line decoder is designed to be used in high-performance memory-decoding or
data-routing applications requiring very short propagation delay times. In high-performance memory systems, this
decoder can be used to minimize the effects of system decoding. When used with high-speed memories utilizing
a fast enable circuit, the delay times of these decoders and the enable time of the memory usually are less than
the typical access time of the memory. This means that the effective system delay introduced by the decoder is
negligible.
T_A
–40°C to 85°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER TOP-SIDE MARKING⁽²⁾
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
Reel of 3000
SN74LVC1G139YEPR
SN74LVC1G139YZPR
_ _ _C9_
SSOP – DCT
Reel of 3000
Reel of 250
SN74LVC1G139DCTR
SN74LVC1G139DCTT
C39_ _ _
VSSOP – DCU
Reel of 3000
Reel of 250
SN74LVC1G139DCUR
SN74LVC1G139DCUT
C39_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2005, Texas Instruments Incorporated