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SN74LVC1G11 Datasheet, PDF (1/11 Pages) Texas Instruments – SINGLE 3 INPUT POSITIVE AND GATE
SN74LVC1G11
SINGLE 3ĆINPUT POSITIVEĆAND GATE
D Available in the Texas Instruments
NanoStar and NanoFree Packages
D Supports 5-V VCC Operation
D Inputs Accept Voltages to 5.5 V
D Max tpd of 4.1 ns at 3.3 V
D Low Power Consumption, 10-µA Max ICC
D ±24-mA Output Drive at 3.3 V
D Ioff Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
SCES487B − SEPTEMBER 2003 − REVISED FEBRUARY 2004
DBV OR DCK PACKAGE
(TOP VIEW)
A1
GND 2
B3
6C
5 VCC
4Y
YEP OR YZP PACKAGE
(BOTTOM VIEW)
B 34 Y
GND 2 5 VCC
A 16 C
The SN74LVC1G11 performs the Boolean function Y + A • B • C or Y + A ) B ) C in positive logic.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
−40°C to 85°C
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
Tape and reel
SN74LVC1G11YEPR
SN74LVC1G11YZPR
_ _ _C3_
SOT (SOT-23) − DBV
Tape and reel SN74LVC1G11DBVR C11_
SOT (SC-70) − DCK
Tape and reel SN74LVC1G11DCKR C3_
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2004, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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