SN74LVC16374A Datasheet, PDF (1/17 Pages) Texas Instruments – 16 BIT EDGE TRIGGERED D TYPE FLIP FLOP WITH 3 STATE OUTPUTS

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SN74LVC16374A
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCAS728A – OCTOBER 2003 – REVISED OCTOBER 2005
FEATURES
• Member of the Texas Instruments Widebus™
Family
• Typical V_OLP (Output Ground Bounce) <0.8 V
at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) >2 V at
V_CC = 3.3 V, T_A = 25°C
• I_off Supports Partial-Power-Down Mode
Operation
• Supports Mixed-Mode Signal Operation on All
Ports (5-V Input and Output Voltages With
3.3-V V_CC)
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This 16-bit edge-triggered D-type flip-flop is designed
for 1.65-V to 3.6-V V_CC operation.
The SN74LVC16374A is particularly suitable for
implementing buffer registers, I/O ports, bidirectional
bus drivers, and working registers. The device can be
used as two 8-bit flip-flops or one 16-bit flip-flop. On
the positive transition of the clock (CLK) input, the Q
outputs of the flip-flop take on the logic levels set up
at the data (D) inputs.
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1OE ¹
1Q1 ²
1Q2 ³
GND ⁴
1Q3 ⁵
1Q4 ⁶
V_CC ⁷
1Q5 ⁸
1Q6 ⁹
GND ¹⁰
1Q7 ¹¹
1Q8 ¹²
2Q1 ¹³
2Q2 ¹⁴
GND ¹⁵
2Q3 ¹⁶
2Q4 ¹⁷
V_CC ¹⁸
2Q5 ¹⁹
2Q6 ²⁰
GND ²¹
2Q7 ²²
2Q8 ²³
2OE ²⁴
48 1CLK
47 1D1
46 1D2
45 GND
44 1D3
43 1D4
42 V_CC
41 1D5
40 1D6
39 GND
38 1D7
37 1D8
36 2D1
35 2D2
34 GND
33 2D3
32 2D4
31 V_CC
30 2D5
29 2D6
28 GND
27 2D7
26 2D8
25 2CLK
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or
low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without interface or pullup components.
T_A
–40°C to 85°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER TOP-SIDE MARKING
FBGA – GRD
FBGA – ZRD (Pb-free)
Tape and reel
SN74LVC16374AGRDR
SN74LVC16374AZRDR
LD374A
SSOP – DL
Tube
Tape and reel
SN74LVC16374ADL
SN74LVC16374ADLR
LVC16374A
TSSOP – DGG
Tape and reel
SN74LVC16374ADGGR
74LVC16374ADGGRG4
LVC16374A
TVSOP – DGV
Tape and reel
SN74LVC16374ADGVR
74LVC16374ADGVRE4
LD374A
VFBGA – GQL
VFBGA – ZQL (Pb-free)
Tape and reel
SN74LVC16374AGQLR
SN74LVC16374AZQLR
LD374A
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2005, Texas Instruments Incorporated