SN74LVC138A-Q1 Datasheet, PDF (1/8 Pages) Texas Instruments – 3-LINETO 8-LINE DECODER/DEMULTIPLEXER

SN74LVC138AĆQ1
3ĆLINE TO 8ĆLINE DECODER/DEMULTIPLEXER
D Qualification in Accordance With
AEC-Q100^†
D Qualified for Automotive Applications
D Customer-Specific Configuration Control
Can Be Supported Along With
Major-Change Approval
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Operates From 2 V to 3.6 V
D Inputs Accept Voltages to 5.5 V
D Max t_pd of 5.8 ns at 3.3 V
D Typical V_OLP (Output Ground Bounce)
<0.8 V at V_CC = 3.3 V, T_A = 25°C
† _{Contact factory for details. Q100 qualification data available on}
request.
SCAS708A − SEPTEMBER 2003 − REVISED MAY 2004
D Typical V_OHV (Output V_OH Undershoot)
>2 V at V_CC = 3.3 V, T_A = 25°C
D OR PW PACKAGE
(TOP VIEW)
A¹
B²
C³
G2A ⁴
G2B ⁵
G1 6
Y7 7
GND 8
16 V_CC
15 Y0
14 Y1
13 Y2
12 Y3
11 Y4
10 Y5
9 Y6
description/ordering information
The SN74LVC138A 3-line to 8-line decoder/demultiplexer is designed for 2.7-V to 3.6-V V_CC operation.
The device is designed for high-performance memory-decoding or data-routing applications requiring very
short propagation delay times. In high-performance memory systems, this decoder minimizes the effects of
system decoding. When employed with high-speed memories utilizing a fast enable circuit, delay times of this
decoder and the enable time of the memory usually are less than the typical access time of the memory. This
means that the effective system delay introduced by the decoder is negligible.
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two
active-low enable inputs and one active-high enable input reduce the need for external gates or inverters when
expanding. A 24-line decoder can be implemented without external inverters, and a 32-line decoder requires
only one inverter. An enable input can be used as a data input for demultiplexing applications.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator
in a mixed 3.3-V/5-V system environment.
ORDERING INFORMATION
TA
PACKAGE‡
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
−40°C to 125°C
SOIC − D
TSSOP − PW
Reel of 2500
Reel of 2000
SN74LVC138AQDRQ1 L138AQ1
SN74LVC138AQPWRQ1 L138AQ1
‡ _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available}
at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright  2004, Texas Instruments Incorporated
1