SN74LV32PWLE Datasheet, PDF (1/10 Pages) Texas Instruments – QUADRUPLE 2-INPUT POSITIVE-OR GATES

SN54LV32, SN74LV32
QUADRUPLE 2ĆINPUT POSITIVEĆOR GATES
SCLS188C − FEBRUARY 1993 − REVISED APRIL 1996
D EPIC  (Enhanced-Performance Implanted
CMOS) 2-µ Process
D Typical V_OLP (Output Ground Bounce)
< 0.8 V at V_CC, T_A = 25°C
D Typical V_OHV (Output V_OH Undershoot)
> 2 V at V_CC, T_A = 25°C
D ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model
(C = 200 pF, R = 0)
D Latch-Up Performance Exceeds 250 mA
Per JEDEC Standard JESD-17
D Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW),
Ceramic Flat (W) Packages, Chip Carriers
(FK), and (J) 300-mil DIPs
description
These quadruple 2-input positive-OR gates are
designed for 2.7-V to 5.5-V V_CC operation.
The ’LV32 perform the Boolean function
Y = A + B or Y = A _@ B in positive logic.
The SN74LV32 is packaged in TI’s shrink
small-outline package (DB), which provides the
same I/O pin count and functionality of standard
small-outline packages in less than half the
printed-circuit-board area.
SN54LV32 . . . J OR W PACKAGE
SN74LV32 . . . D, DB, OR PW PACKAGE
(TOP VIEW)
1A ₁
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
14 ^V_CC
13 4B
12 4A
11 4Y
10 3B
9 3A
8 3Y
SN54LV32 . . . FK PACKAGE
(TOP VIEW)
1Y
3 2 1 20 19
4
18
4A
NC 5
17 NC
2A 6
16 4Y
NC 7
15 NC
2B 8
14 3B
9 10 11 12 13
NC − No internal connection
The SN54LV32 is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74LV32 is characterized for operation from −40°C to 85°C.
FUNCTION TABLE
(each gate)
INPUTS
A
B
OUTPUT
Y
H
X
H
X
H
H
L
L
L
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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Copyright  1996, Texas Instruments Incorporated
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