SN74HCT573 Datasheet, PDF (1/11 Pages) Texas Instruments – OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

SN54HCT573, SN74HCT573
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS176E – MARCH 1984 – REVISED JULY 2003
D Operating Voltage Range of 4.5 V to 5.5 V
D High-Current 3-State Outputs Drive Bus
Lines Directly or Up To 15 LSTTL Loads
SN54HCT573 . . . J OR W PACKAGE
SN74HCT573 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
D Low Power Consumption, 80-µA Max I_CC
D Typical t_pd = 21 ns
D ±6-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
D Inputs Are TTL-Voltage Compatible
D Bus-Structured Pinout
OE 1
1D 2
2D 3
3D 4
4D 5
5D 6
6D 7
20 V_CC
19 1Q
18 2Q
17 3Q
16 4Q
15 5Q
14 6Q
description/ordering information
7D 8
8D 9
13 7Q
12 8Q
These octal transparent D-type latches feature
GND 10 11 LE
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. The ’HCT573 devices are particularly
SN54HCT573 . . . FK PACKAGE
(TOP VIEW)
suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working
registers.
While the latch-enable (LE) input is high, the
Q outputs respond to the data (D) inputs. When
LE is low, the outputs are latched to retain the data
that was set up at the D inputs.
A buffered output-enable (OE) input can be used
3D
3 2 1 20 19
4
18
2Q
4D 5
17 3Q
5D 6
16 4Q
6D 7
15 5Q
7D 8
14 6Q
9 10 11 12 13
to place the eight outputs in either a normal logic
state (high or low logic levels) or the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased
drive provide the capability to drive bus lines without interface or pullup components.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP – N
Tube
SN74HCT573N
SN74HCT573N
SOIC – DW
Tube
Tape and reel
SN74HCT573DW
SN74HCT573DWR
HCT573
–40°C to 85°C SOP – NS
Tape and reel SN74HCT573NSR
HCT573
SSOP – DB
Tape and reel SN74HCT573DBR
HT573
TSSOP – PW
Tube
Tape and reel
SN74HCT573PW
SN74HCT573PWR
HT573
CDIP – J
Tube
SNJ54HCT573J
SNJ54HCT573J
–55°C to 125°C CFP – W
Tube
SNJ54HCT573W
SNJ54HCT573W
LCCC – FK
Tube
SNJ54HCT573FK
SNJ54HCT573FK
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are}
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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Copyright  2003, Texas Instruments Incorporated
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