SN74GTLPH1645 Datasheet, PDF (1/17 Pages) Texas Instruments – 16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER

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SN74GTLPH1645
16-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVER
SCES290D – OCTOBER 1999 – REVISED JUNE 2005
FEATURES
• Member of the Texas Instruments Widebus™
Family
• TI-OPC™ Circuitry Limits Ringing on
Unevenly Loaded Backplanes
• OEC™ Circuitry Improves Signal Integrity and
Reduces Electromagnetic Interference
• Bidirectional Interface Between GTLP Signal
Levels and LVTTL Logic Levels
• LVTTL Interfaces Are 5-V Tolerant
• High-Drive GTLP Outputs (100 mA)
• LVTTL Outputs (–24 mA/24 mA)
• Variable Edge-Rate Control (ERC) Input
Selects GTLP Rise and Fall Times for Optimal
Data-Transfer Rate and Signal Integrity in
Distributed Loads
• I_off, Power-Up 3-State, and BIAS V_CC Support
Live Insertion
• Bus Hold on A-Port Data Inputs
• Distributed V_CC and GND Pins Minimize
High-Speed Switching Noise
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
DGG OR DGV PACKAGE
(TOP VIEW)
1DIR 1
1A1 2
1A2 3
GND 4
1A3 5
1A4 6
V_CC 7
GND 8
1A5 9
1A6 10
GND 11
1A7 12
1A8 13
GND 14
ERC 15
2A1 16
2A2 17
GND 18
2A3 19
2A4 20
GND 21
V_CC 22
2A5 23
2A6 24
GND 25
2A7 26
2A8 27
2DIR 28
56 1OE
55 1B1
54 1B2
53 GND
52 1B3
51 1B4
50 V_CC
49 GND
48 1B5
47 1B6
46 GND
45 1B7
44 1B8
43 BIAS V_CC
42 V_REF
41 2B1
40 2B2
39 GND
38 2B3
37 2B4
36 GND
35 V_CC
34 2B5
33 2B6
32 GND
31 2B7
30 2B8
29 2OE
DESCRIPTION/ORDERING INFORMATION
The SN74GTLPH1645 is a high-drive, 16-bit bus transceiver that provides LVTTL-to-GTLP and GTLP-to-LVTTL
signal-level translation. It is partitioned as two 8-bit transceivers. The device provides a high-speed interface
between cards operating at LVTTL logic levels and a backplane operating at GTLP signal levels. High-speed
(about three times faster than standard LVTTL or TTL) backplane operation is a direct result of GTLP's reduced
output swing (<1 V), reduced input threshold levels, improved differential input, OEC™ circuitry, and TI-OPC™
circuitry. Improved GTLP OEC and TI-OPC circuits minimize bus-settling time and have been designed and
tested using several backplane models. The high drive allows incident-wave switching in heavily loaded
backplanes with equivalent load impedance down to 11 Ω.
GTLP is the Texas Instruments derivative of the Gunning Transceiver Logic (GTL) JEDEC standard JESD 8-3.
The ac specification of the SN74GTLPH1645 is given only at the preferred higher noise-margin GTLP, but the
user has the flexibility of using this device at either GTL (V_TT = 1.2 V and V_REF = 0.8 V) or GTLP (V_TT = 1.5 V and
V_REF = 1 V) signal levels.
Normally, the B port operates at GTLP signal levels. The A-port and control inputs operate at LVTTL logic levels,
but are 5-V tolerant and are compatible with TTL and 5-V CMOS inputs. V_REF is the B-port differential input
reference voltage.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, TI-OPC, OEC are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1999–2005, Texas Instruments Incorporated