SN74GTLP22034 Datasheet, PDF (1/20 Pages) Texas Instruments – 8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND FEEDBACK PATH

SN74GTLP22034
8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER
WITH SPLIT LVTTL PORT AND FEEDBACK PATH
SCES355C – JUNE 2001 – REVISED SEPTEMBER 2001
D Member of the Texas Instruments
Widebus Family
D TI-OPC Circuitry Limits Ringing on
Unevenly Loaded Backplanes
D OEC Circuitry Improves Signal Integrity
and Reduces Electromagnetic Interference
D Bidirectional Interface Between GTLP
Signal Levels and LVTTL Logic Levels
D Split LVTTL Port Provides a Feedback Path
for Control and Diagnostics Monitoring
D AO Outputs Have Equivalent 26-Ω Series
Resistors, So No External Resistors Are
Required
D LVTTL Interfaces Are 5-V Tolerant
D High-Drive GTLP Open-Drain Outputs
(100 mA)
D LVTTL Outputs (–12 mA/12 mA)
D Variable Edge-Rate Control (ERC) Input
Selects GTLP Rise and Fall Times for
Optimal Data-Transfer Rate and Signal
Integrity in Distributed Loads
D I_off, Power-Up 3-State, and BIAS V_CC
Support Live Insertion
D Distributed V_CC and GND Pins Minimize
High-Speed Switching Noise
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DGG OR DGV PACKAGE
(TOP VIEW)
IMODE1 1
AI1 2
AO1 3
GND 4
AI2 5
AO2 6
V_CC 7
AI3 8
AO3 9
GND 10
AI4 11
AO4 12
AO5 13
AI5 14
GND 15
AO6 16
AI6 17
V_CC 18
AO7 19
AI7 20
GND 21
AO8 22
AI8 23
OMODE0 24
48 IMODE0
47 BIAS V_CC
46 B1
45 GND
44 OEAB
43 B2
42 ERC
41 OEAB
40 B3
39 GND
38 CLKAB/LEAB
37 B4
36 B5
35 CLKBA/LEBA
34 GND
33 B6
32 OEBA
31 V_CC
30 B7
29 LOOPBACK
28 GND
27 B8
26 V_REF
25 OMODE1
description
The SN74GTLP22034 is a high-drive, 8-bit, three-wire registered transceiver that provides true LVTTL-to-GTLP
and GTLP-to-LVTTL signal-level translation. The device allows for transparent, latched, and flip-flop modes of
data transfer with separate LVTTL input and LVTTL output pins, which provides a feedback path for control and
diagnostics monitoring, the same functionality as the SN74FB2033, but with true logic. The device provides a
high-speed interface between cards operating at LVTTL logic levels and a backplane operating at GTLP signal
levels. High-speed (about three times faster than standard LVTTL or TTL) backplane operation is a direct result
of GTLP’s reduced output swing (<1 V), reduced input threshold levels, improved differential input, OEC
circuitry, and TI-OPC circuitry. Improved GTLP OEC and TI-OPC circuits minimize bus-settling time and have
been designed and tested using several backplane models. The high drive allows incident-wave switching in
heavily loaded backplanes with equivalent load impedance down to 11 Ω.
The AO outputs, which are designed to sink up to 12 mA, include equivalent 26-Ω resistors to reduce overshoot
and undershoot.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OEC, TI-OPC, and Widebus are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2001, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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