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SN74GTL2107 Datasheet, PDF (1/10 Pages) Texas Instruments – 12-BIT GTL-/GTL/GTL+ TO LVTTL TRANSLATOR
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SN74GTL2107
12-BIT GTL–/GTL/GTL+ TO LVTTL TRANSLATOR
SCLS699 – JULY 2006
FEATURES
• Operates as a GTL–/GTL/GTL+ to LVTTL or
LVTTL to GTL–/GTL/GTL+ Translator
• Series Termination on TTL Output of 30 Ω
• Latch-Up Testing Done to JEDEC Standard
JESD 78
• ESD Performance Tested Per JESD 22
– 2000-V Human-Body Model
(A114-B, Class II)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
PW PACKAGE
(TOP VIEW)
VREF 1
1AO 2
2AO 3
5A 4
6A 5
EN1 6
11BI 7
11A 8
9BI 9
3AO 10
4AO 11
10AI1 12
10AI2 13
GND 14
28 VCC
27 1BI
26 2BI
25 7BO1
24 7BO2
23 EN2
22 11BO
21 5BI
20 6BI
19 3BI
18 4BI
17 10BO1
16 10BO2
15 9AO
DESCRIPTION/ORDERING INFORMATION
The SN74GTL2107 is a 12-bit translator that interfaces between the 3.3-V LVTTL chip set I/O and the Xeon™
processor GTL–/GTL/GTL+ I/O. The device is designed for platform health management in dual-processor
applications.
PIN DESCRIPTION
PIN NO.
1
2–6, 8, 10–13,
15, 23
7, 9, 16, 17–22,
24–27
14
28
SYMBOL
NAME AND FUNCTION
VREF
ENn
nAn
GTL reference voltage
Data and enable inputs/outputs (LVTTL)
on all inputs and pin 15 output.
Remaining outputs are open drain.
nBn Data inputs/outputs (GTL–/GTL/GTL+)
GND
VCC
Ground (0 V)
Positive supply voltage
TA
–40°C to 85°C
ORDERING INFORMATION
PACKAGE (1)
ORDERABLE PART NUMBER
TSSOP – PW
Tube
Tape and reel
SN74GTL2107PW
SN74GTL2107PWR
TOP-SIDE MARKING
GK2107
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Xeon is a trademark of Intel Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated