SN74GTL1655DGGR Datasheet, PDF (1/17 Pages) Texas Instruments – 16-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVER WITH LIVE INSERTION

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SN74GTL1655
16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVER
WITH LIVE INSERTION
SCBS696I – JULY 1997 – REVISED APRIL 2005
FEATURES
• Member of the Texas Instruments Widebus™
Family
• UBT™ Transceiver Combines D-Type Latches
and D-Type Flip-Flops for Operation in
Transparent, Latched, or Clocked Modes
• OEC™ Circuitry Improves Signal Integrity and
Reduces Electromagnetic Interference
• Translates Between GTL/GTL+ Signal Level
and LVTTL Logic Levels
• High-Drive (100 mA), Low-Output-Impedance
(12 Ω) Bus Transceiver (B Port)
• Edge-Rate-Control Input Configures the
B-Port Output Rise and Fall Times
• I_off, Power-Up 3-State, and BIAS V_CC Support
Live Insertion
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors on A
Port
• Distributed V_CC and GND Pins Minimize
High-Speed Switching Noise
DESCRIPTION/ORDERING INFORMATION
The SN74GTL1655 is a high-drive (100 mA),
low-output-impedance (12 Ω) 16-bit UBT™
transceiver that provides LVTTL-to-GTL/GTL+ and
GTL/GTL+-to-LVTTL signal-level translation. This
device is partitioned as two 8-bit transceivers and
combines D-type flip-flops and D-type latches to allow
for transparent, latched, and clocked modes of data
transfer similar to the '16501 function. This device
provides an interface between cards operating at
LVTTL logic levels and a backplane operating at
GTL/GTL+ signal levels. Higher-speed operation is a
direct result of the reduced output swing (<1 V),
reduced input threshold levels, and OEC™ circuitry.
The high drive is suitable for driving
double-terminated low-impedance backplanes using
incident-wave switching.
DGG PACKAGE
(TOP VIEW)
1OEAB 1
1OEBA 2
V_CC 3
1A1 4
GND 5
1A2 6
1A3 7
GND 8
1A4 9
GND 10
1A5 11
GND 12
1A6 13
1A7 14
V_CC 15
1A8 16
2A1 17
GND 18
2A2 19
2A3 20
GND 21
2A4 22
2A5 23
GND 24
2A6 25
GND 26
2A7 27
V_CC 28
2A8 29
GND ³⁰
2OEAB ³¹
2OEBA 32
64 CLK
63 1LEAB
62 1LEBA
61 V_ERC
60 GND
59 1B1
58 1B2
57 GND
56 1B3
55 1B4
54 1B5
53 GND
52 1B6
51 1B7
50 V_CC
49 1B8
48 2B1
47 GND
46 2B2
45 2B3
44 GND
43 2B4
42 2B5
41 V_REF
40 2B6
39 GND
38 2B7
37 2B8
36 BIAS V_CC
35 _2LEAB
34 _2LEBA
33 OE
The user has the flexibility of using this device at either GTL (V_TT = 1.2 V and V_REF = 0.8 V) or the preferred
higher noise margin GTL+ (V_TT = 1.5 V and V_REF = 1 V) signal levels. GTL+ is the Texas Instruments derivative
of the Gunning Transceiver Logic (GTL) JEDEC standard JESD 8-3. The B port normally operates at GTL or
GTL+ signal levels, while the A-port and control inputs are compatible with LVTTL logic levels, but are not 5-V
tolerant. V_REF is the reference input voltage for the B port.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, UBT, OEC are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2005, Texas Instruments Incorporated