SN74CBTU4411 Datasheet, PDF (1/15 Pages) Texas Instruments – 11-BIT 1-OF-4 FET MULTIPLEXER/DEMULTIPLEXER 1.8-V DDR-II SWITCH WITH CHARGE PUMP AND PRECHARGED OUTPUTS

SN74CBTU4411
11ĆBIT 1ĆOFĆ4 FET MULTIPLEXER/DEMULTIPLEXER
1.8ĆV DDRĆII SWITCH WITH CHARGE PUMP AND PRECHARGED OUTPUTS
SCDS192 − APRIL 2005
D Supports SSTL_18 Signaling Levels
D Suitable for DDR-II Applications
D D−Port Outputs Are Precharged by Bias
Voltage (V_BIAS)
D Internal Termination for Control Inputs
D High Bandwidth (334 MHz Min)
D Low and Flat ON-State Resistance (r_on)
Characteristics, (r_on = 17 W Max)
D Internal 400-W Pulldown Resistors
D Low Differential and Rising/Falling Edge
Skew
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 1000-V Charged-Device Model (C101)
description/ordering information
The SN74CBTU4411 is a high-bandwidth, SSTL_18 compatible FET multiplexer/demultiplexer with low
ON-state resistance (r_on). The device utilizes an internal charge pump to elevate the gate voltage of the pass
transistor, providing a low and flat r_on. The low and flat r_on allows for minimal propagation delay and supports
rail-to-rail signaling on data input/output (I/O) ports. The device also features very low data I/O capacitance to
minimize capacitive loading and signal distortion on the data bus. Matched r_on and I/O capacitance among
channels results in extremely low differential and rising/falling edge skew. This allows the device to show optimal
performance in DDR-II applications.
The device is organized as an 11-bit 1-of-4 multiplexer/demultiplexer with a single switch-enable (EN) input.
When EN is low, the switch is enabled and the H port is connected to one of the D ports. Ports D0 to D9 for the
disabled channels are connected to V_BIAS through a 400 Ω resistor. DQS_EN determines the output voltage
for the disabled D10 ports. When DQS_EN is low, this voltage is V_BIAS. When DQS_EN is high, the disabled
D10 ports are connected to an internal voltage (V_{BIAS_DQS}) source, which is approximately equal to 0.7 V_DD.
When EN is high, all the channels are disabled. Ports D0 to D9 are connected to V_BIAS. For the D10 port, the
disabled output voltage is determined by the DQS_EN input. When DQS_EN is low, this voltage is V_BIAS. When
DQS_EN is high, this voltage is V_DD.
The select (S0, S1) inputs control the data path of each multiplexer/demultiplexer. The EN and TC inputs
determine the internal termination for S0 and S1 inputs. When EN is low, the termination is determined by the
TC input. When both EN and TC are low, termination resistors are disconnected from the S inputs. When EN
is low and TC is high, both pullup and pulldown resistors are connected to the S inputs. When EN is high, only
the pulldown termination resistors are connected to the S inputs, regardless of the voltage level at the TC input.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
0°C to 85°C LFBGA − GST
Tape and reel SN74CBTU4411GSTR
CTU4411
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design}
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright  2005, Texas Instruments Incorporated
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