SN74CBTLV3384_07 Datasheet, PDF (1/9 Pages) Texas Instruments – LOW-VOLTAGE 10-BIT FET BUS SWITCH

SN74CBTLV3384
LOWĆVOLTAGE 10ĆBIT FET BUS SWITCH
SCDS059G − MARCH 1998 − REVISED JUNE 2004
D 5-Ω Switch Connection Between Two Ports
D Rail-to-Rail Switching on Data I/O Ports
D I_off Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
description/ordering information
The SN74CBTLV3384 provides ten bits of
high-speed bus switching. The low on-state
resistance of the switch allows connections to be
made with minimal propagation delay.
DBQ, DGV, DW, OR PW PACKAGE
(TOP VIEW)
1OE 1
1B1 2
1A1 3
1A2 4
1B2 5
1B3 6
1A3 7
1A4 8
1B4 9
1B5 10
1A5 11
GND 12
24 V_CC
23 2B5
22 2A5
21 2A4
20 2B4
19 2B3
18 2A3
17 2A2
16 2B2
15 2B1
14 2A1
13 2OE
The device is organized as dual 5-bit bus switches
with separate output-enable (OE) inputs. It can be
used as two 5-bit bus switches or one 10-bit bus switch. When OE is low, the associated 5-bit bus switch is on,
and A port is connected to B port. When OE is high, the switch is open, and the high-impedance state exists
between the two ports.
This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
To ensure the high-impedance state during power up or power down, OE shall be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
QSOP − DBQ Tape and reel SN74CBTLV3384DBQR CBTLV3384
−40°C to 85°C ^{SOIC − DW}
Tube
Tape and reel
SN74CBTLV3384DW
SN74CBTLV3384DWR
CBTLV3384
TSSOP − PW Tape and reel SN74CBTLV3384PWR CL384
TVSOP − DGV Tape and reel SN74CBTLV3384DGVR CL384
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design}
guidelines are available at www.ti.com/sc/package.
FUNCTION TABLE
(each 5-bit bus switch)
INPUTS
INPUTS/OUTPUTS
1OE 2OE 1B1−1B5 2B1−2B5
L
L 1A1−1A5 2A1−2A5
L
H 1A1−1A5
Z
H
L
Z
2A1−2A5
H
H
Z
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright  2004, Texas Instruments Incorporated
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