SN74CBTLV3126 Datasheet, PDF (1/6 Pages) Texas Instruments – LOW-VOLTAGE QUADRUPLE FET BUS SWITCH

SN74CBTLV3126
LOW-VOLTAGE QUADRUPLE FET BUS SWITCH
D Standard ’126-Type Pinout
D 5-Ω Switch Connection Between Two Ports
D Isolation Under Power-Off Conditions
D Latch-up Performance Exceeds 100 mA per
JESD 78, Class II
D Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DBQ), Thin Very Small-Outline (DGV), and
Thin Shrink Small-Outline (PW) Packages
description
The SN74CBTLV3126 quadruple FET bus switch
features independent line switches. Each switch
is disabled when the associated output-enable
(OE) input is low.
To ensure the high-impedance state during power
up or power down, OE should be tied to GND
through a pulldown resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
The SN74CBTLV3126 is characterized for
operation from –40°C to 85°C.
SCDS038D – DECEMBER 1997 – REVISED JULY 1999
D, DGV, OR PW PACKAGE
(TOP VIEW)
1OE 1
1A 2
1B 3
2OE 4
2A 5
2B 6
GND 7
14 V_CC
13 4OE
12 4A
11 4B
10 3OE
9 3A
8 3B
DBQ PACKAGE
(TOP VIEW)
NC 1
1OE 2
1A 3
1B 4
2OE 5
2A 6
2B 7
GND 8
16 V_CC
15 4OE
14 4A
13 4B
12 3OE
11 3A
10 3B
9 NC
NC – No internal connection
FUNCTION TABLE
(each bus switch)
INPUT
OE
FUNCTION
L
Disconnect
H
A port = B port
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright © 1999, Texas Instruments Incorporated
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