SN74CBTLV1G125 Datasheet, PDF (1/8 Pages) Texas Instruments – LOW-VOLTAGE SINGLE FET BUS SWITCH

SN74CBTLV1G125
LOWĆVOLTAGE SINGLE FET BUS SWITCH
SCDS057G − MARCH 1998 − REVISED OCTOBER 2003
D 5-Ω Switch Connection Between Two Ports
D Rail-to-Rail Switching on Data I/O Ports
D I_off Supports Partial-Power-Down Mode
Operation
description/ordering information
DBV OR DCK PACKAGE
(TOP VIEW)
OE 1
A2
GND 3
5 V_CC
4B
The SN74CBTLV1G125 features a single
high-speed line switch. The switch is disabled
when the output-enable (OE) input is high.
This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
SOT (SOT-23) − DBV Tape and reel SN74CBTLV1G125DBVR
−40°C to 85°C
SOT (SC-70) − DCK Tape and reel SN74CBTLV1G125DCKR
V25_
VM_
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines}
are available at www.ti.com/sc/package.
‡ _{The actual top-side marking has one additional character that designates the assembly/test site.}
FUNCTION TABLE
INPUT
OE
FUNCTION
L
A port = B port
H
Disconnect
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Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright  2003, Texas Instruments Incorporated
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