SN74CBTLV16800_08 Datasheet, PDF (1/12 Pages) Texas Instruments – LOW-VOLTAGE 20-BIT FET BUS SWITCH WITH PRECHARGED OUTPUTS

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SN74CBTLV16800
LOW-VOLTAGE 20-BIT FET BUS SWITCH
WITH PRECHARGED OUTPUTS
SCDS045J – DECEMBER 1997 – REVISED MARCH 2005
FEATURES
• Member of the Texas Instruments Widebus™
Family
• 5-Ω Switch Connection Between Two Ports
• Rail-to-Rail Switching on Data I/O Ports
• I_off Supports Partial-Power-Down Mode
Operation
• B-Port Outputs Are Precharged by Bias
Voltage to Minimize Signal Distortion During
Live Insertion
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
DESCRIPTION/ORDERING INFORMATION
The SN74CBTLV16800 provides 20 bits of
high-speed bus switching. The low on-state
resistance of the switch allows connections to be
made with minimal propagation delay. The device
also precharges the B port to a user-selectable bias
voltage (BIASV) to minimize live-insertion noise.
The device is organized as dual 10-bit bus switches
with separate output-enable (OE) inputs. It can be
used as two 10-bit bus switches or one 20-bit bus
switch. When OE is low, the associated 10-bit bus
switch is on, and port A is connected to port B. When
OE is high, the switch is open, the high-impedance
state exists between the two ports, and port B is
precharged to BIASV through the equivalent of a
10-kΩ resistor.
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
BIASV 1
1A1 2
1A2 3
1A3 4
1A4 5
1A5 6
1A6 7
GND 8
1A7 9
1A8 10
1A9 11
1A10 12
2A1 13
2A2 14
V_CC 15
2A3 16
GND 17
2A4 18
2A5 19
2A6 20
2A7 21
2A8 22
2A9 ²³
2A10 ²⁴
48 1OE
47 2OE
46 1B1
45 1B2
44 1B3
43 1B4
42 1B5
41 GND
40 1B6
39 1B7
38 1B8
37 1B9
36 1B10
35 2B1
34 2B2
33 2B3
32 GND
31 2B4
30 2B5
29 2B6
28 2B7
27 2B8
26 _2B9
25 _2B10
<br/>
This device is fully specified for partial-power-down applications using I_off. The I_off feature ensures that damaging
current will not backflow through the device when it is powered down. The device has isolation during power off.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
T_A
–40°C to 85°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER
SSOP – DL
Tube
Tape and reel
SN74CBTLV16800DL
SN74CBTLV16800DLR
TSSOP – DGG Tape and reel
SN74CBTLV16800GR
TVSOP – DGV Tape and reel
SN74CBTLV16800VR
TOP-SIDE MARKING
CBTLV16800
CBTLV16800
CN800
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2005, Texas Instruments Incorporated