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SN74AVCH4T245_07 Datasheet, PDF (1/19 Pages) Texas Instruments – 4-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
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SN74AVCH4T245
4-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES577B – JUNE 2004 – REVISED FEBRUARY 2006
FEATURES
• Control Inputs VIH/VIL Levels Are Referenced
to VCCA Voltage
• Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.2-V to
3.6-V Power-Supply Range
• I/Os Are 4.6-V Tolerant
• Ioff Supports Partial Power-Down-Mode
Operation
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 8000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
D, DGV, OR PW PACKAGE
(TOP VIEW)
RGY PACKAGE
(TOP VIEW)
VCCA 1
1DIR 2
2DIR 3
1A1 4
1A2 5
2A1 6
2A2 7
GND 8
16 VCCB
15 1OE
14 2OE
13 1B1
12 1B2
11 2B1
10 2B2
9 GND
1
1DIR 2
2DIR 3
1A1 4
1A2 5
2A1 6
2A2 7
8
16
15 1OE
14 2OE
13 1B1
12 1B2
11 2B1
10 2B2
9
DESCRIPTION/ORDERING INFORMATION
This 4-bit noninverting bus transceiver uses two separate configurable power-supply rails. The A port is designed
to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB
accepts any supply voltage from 1.2 V to 3.6 V. The SN74AVCH4T245 is optimized to operate with VCCA/VCCB
set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. This allows for universal low-voltage
bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCH4T245 is designed for asynchronous communication between data buses. The device transmits
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74AVCH4T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance
state. The bus-hold circuitry on the powered-up side always stays active.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2006, Texas Instruments Incorporated