SN74AVCH2T45_09 Datasheet, PDF (1/24 Pages) Texas Instruments – DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS

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SN74AVCH2T45
DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
SCES582F – JULY 2004 – REVISED NOVEMBER 2007
FEATURES
1
•2 Available in the Texas Instruments NanoFree™
Package
• Control Inputs V_IH/V_IL Levels Are Referenced to
V_CCA Voltage
• Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.2-V to
3.6-V Power-Supply Range
• I/Os Are 4.6-V Tolerant
• I_off Supports Partial Power-Down-Mode
Operation
• Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
• Max Data Rates
– 500 Mbps (1.8-V to 3.3-V Translation)
– 320 Mbps (<1.8-V to 3.3-V Translation)
– 320 Mbps (Translate to 2.5 V or 1.8 V)
– 280 Mbps (Translate to 1.5 V)
– 240 Mbps (Translate to 1.2 V)
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DCT OR DCU PACKAGE
(TOP VIEW)
V_CCA 1
A1 2
A2 3
GND 4
8 V_CCB
7 B1
6 B2
5 DIR
YZP PACKAGE
(BOTTOM VIEW)
GND
A2
A1
V_CCA
4 5 D1
D2
3 6 ^C1
C2
2 7 B1
B2
1 8 A1
A2
DIR
B2
B1
V_CCB
DESCRIPTION/ORDERING INFORMATION
This dual-bit noninverting bus transceiver uses two separate configurable power-supply rails. The
SN74AVCH2T45 is optimized to operate with V_CCA/V_CCB set at 1.4 V to 3.6 V. It is operational with V_CCA/V_CCB as
low as 1.2 V. The A port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.2 V to 3.6 V. The B
port is designed to track V_CCB. V_CCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal
low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
T_A
–40°C to 85°C
ORDERING INFORMATION
PACKAGE ^{(1) (2)}
ORDERABLE PART NUMBER
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
Reel of 3000
SN74AVCH2T45YZPR
SSOP – DCT
Reel of 3000 SN74AVCH2T45DCTR
VSSOP – DCU
Reel of 3000 SN74AVCH2T45DCUR
TOP-SIDE MARKING⁽³⁾
_ _ _TF_
ET2_ _ _
ET2_
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
(3) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2004–2007, Texas Instruments Incorporated