SN74AVCAH164245 Datasheet, PDF (1/15 Pages) Texas Instruments – 16 BIT DUAL BUS TRANSCEIVER

SN74AVCAH164245
16ĆBIT DUALĆSUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3ĆSTATE OUTPUTS
SCES396A − JULY 2002 − REVISED MAY 2004
D Member of the Texas Instruments
Widebus Family
D DOC Circuitry Dynamically Changes
Output Impedance, Resulting in Noise
Reduction Without Speed Degradation
D Dynamic Drive Capability Is Equivalent to
Standard Outputs With I_OH and I_OL of
±24 mA at 2.5-V V_CC
D Control Inputs V_IH/V_IL Levels are
Referenced to V_CCA Voltage
D If Either V_CC Input Is at GND, Both Ports
Are in the High-Impedance State
D Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
D I_off Supports Partial-Power-Down Mode
Operation
D Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.4-V to
3.6-V Power-Supply Range
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup / Pulldown
Resistors
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
This 16-bit (dual-octal) noninverting bus transceiver uses two separate configurable power-supply rails. The
A-port is designed to track V_CCA. V_CCA accepts any supply voltage from 1.4 V to 3.6 V. The B-port is designed
to track V_CCB. V_CCB accepts any supply voltage from 1.4 V to 3.6 V. This allows for universal low-voltage
bidirectional translation between any of the 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes.
The SN74AVCAH164245 is designed for asynchronous communication between data buses. The device
transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are
effectively isolated.
The SN74AVCAH164245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by
V_CCA.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup
or pulldown resistors with the bus-hold circuitry is not recommended.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CCA through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down. If either V_CC input is at GND,
then both ports are in the high-impedance state.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
TSSOP − DGG Tape and reel SN74AVCAH164245GR AVCAH164245
−40°C to 85°C ^{TVSOP − DGV Tape and reel SN74AVCAH164245VR WAH4245}
VFBGA − GQL Tape and reel SN74AVCAH164245KR WAH4245
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines}
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DOC and Widebus are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2004, Texas Instruments Incorporated
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