SN74AUC2G66 Datasheet, PDF (1/16 Pages) Texas Instruments – DUAL BILATERAL ANALOG SWITCH

SN74AUC2G66
DUAL BILATERAL ANALOG SWITCH
D Available in the Texas Instruments
NanoStar and NanoFree Packages
D Operates at 0.8 V to 2.7 V
D Sub 1-V Operable
D Max t_pd of 0.5 ns at 1.8 V
D Low Power Consumption, 10 µA at 2.7 V
D High On-Off Output Voltage Ratio
D High Degree of Linearity
D Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
D ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
SCES507 − NOVEMBER 2003
DCT OR DCU PACKAGE
(TOP VIEW)
1A 1
1B 2
2C 3
GND 4
8 V_CC
7 1C
6 2B
5 2A
YEP OR YZP PACKAGE
(BOTTOM VIEW)
GND 4 5 2A
2C 3 6 2B
1B 2 7 1C
1A 1 8 V_CC
description/ordering information
This dual analog switch is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.1-V to 2.7-V V_CC
operation.
The SN74AUC2G66 can handle both analog and digital signals. It permits signals with amplitudes of up to 2.7-V
(peak) to be transmitted in either direction.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
Applications include signal gating, chopping, modulation or demodulation (modem), and signal multiplexing for
analog-to-digital and digital-to-analog conversion systems.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING‡
−40°C to 85°C
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
Tape and reel SN74AUC2G66YEPR
Tape and reel SN74AUC2G66YZPR
_ _ _U6_
SSOP − DCT
Tape and reel SN74AUC2G66DCTR U66_ _ _
VSSOP − DCU
Tape and reel SN74AUC2G66DCUR U66_
† _{Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at}
www.ti.com/sc/package.
‡ _{DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.}
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  2003, Texas Instruments Incorporated
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
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