SN74AUC1G240 Datasheet, PDF (1/13 Pages) Texas Instruments – SINGLE BUFFER/DRIVER WITH 3-STATE OUTPUT

www.ti.com
SN74AUC1G240
SINGLE BUFFER/DRIVER
WITH 3-STATE OUTPUT
SCES384I – MARCH 2002 – REVISED FEBRUARY 2007
FEATURES
• Available in the Texas Instruments
NanoFree™ Package
• Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
• I_off Supports Partial-Power-Down Mode
Operation
• Sub-1-V Operable
• Max t_pd of 2.5 ns at 1.8 V
DBV PACKAGE
(TOP VIEW)
• Low Power Consumption, 10-µA Max I_CC
• ±8-mA Output Drive at 1.8 V
• Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DCK PACKAGE
(TOP VIEW)
YZP PACKAGE
(BOTTOM VIEW)
OE
1
A
2
OE
1
5
V_CC
GND ^{3 4} Y
5
V_CC
A²
A
2
OE ^{1 5 V}_CC
GND
3
4Y
GND
3
4
Y
See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION
This bus buffer gate is operational at 0.8-V to 2.7-V V_CC, but is designed specifically for 1.65-V to 1.95-V V_CC
operation.
The SN74AUC1G240 is a single line driver with a 3-state output. The output is disabled when the output-enable
(OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the
package.
This device is fully specified for partial-power-down applications using I_off. The I_off circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
T_A
–40°C to 85°C
PACKAGE ⁽¹⁾
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SOT (SOT-23) – DBV
Reel of 3000
Reel of 3000
ORDERABLE PART NUMBER TOP-SIDE MARKING⁽²⁾
SN74AUC1G240YZPR
_ _ _UK_
SN74AUC1G240DBVR
U40_
SOT (SC-70) – DCK
Reel of 3000 SN74AUC1G240DCKR
UK_
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2002–2007, Texas Instruments Incorporated