SN74ALVCH16825 Datasheet, PDF (1/8 Pages) Texas Instruments – 18-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

SN74ALVCH16825
18-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCES039C – JULY 1995 – REVISED FEBRUARY 1999
D Member of the Texas Instruments
Widebus™ Family
D EPIC ™ (Enhanced-Performance Implanted
CMOS) Submicron Process
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
description
This 18-bit buffer and line driver is designed for
1.65-V to 3.6-V V_CC operation.
This SN74ALVCH16825 improves the
performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented
receivers and transmitters.
The device can be used as two 9-bit buffers or one
18-bit buffer. It provides true data.
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable
(OE1 or OE2) input is high, all nine affected
outputs are in the high-impedance state.
DGG OR DL PACKAGE
(TOP VIEW)
1OE1 ₁
1Y1 ₂
1Y2 ₃
GND 4
1Y3 5
1Y4 6
V_CC 7
1Y5 8
1Y6 9
1Y7 10
GND 11
1Y8 12
1Y9 13
GND 14
GND 15
2Y1 16
2Y2 17
GND 18
2Y3 19
2Y4 20
2Y5 21
V_CC 22
2Y6 23
2Y7 24
GND 25
2Y8 26
2Y9 ²⁷
2OE1 ²⁸
56 ^1OE2
55 ^1A1
54 ^1A2
53 GND
52 1A3
51 1A4
50 V_CC
49 1A5
48 1A6
47 1A7
46 GND
45 1A8
44 1A9
43 GND
42 GND
41 2A1
40 2A2
39 GND
38 2A3
37 2A4
36 2A5
35 V_CC
34 2A6
33 2A7
32 GND
31 2A8
30 2A9
29 _2OE2
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.
The SN74ALVCH16825 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 9-bit section)
INPUTS
OE1 OE2 A
OUTPUT
Y
L
L
L
L
L
L
H
H
H
X
X
Z
X
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1999, Texas Instruments Incorporated
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