SN74ALVCH16525 Datasheet, PDF (1/10 Pages) Texas Instruments – 18-BIT REGISTERED BUS TRANSCEIVER WITH 3-STATE OUTPUTS

SN74ALVCH16525
18-BIT REGISTERED BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES059D – NOVEMBER 1995 – REVISED SEPTEMBER 1999
D Member of the Texas Instruments
Widebus ™ Family
D EPIC ™ (Enhanced-Performance Implanted
CMOS) Submicron Process
D ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D Package Option Includes Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
description
This 18-bit universal bus transceiver is designed
for 1.65-V to 3.6-V V_CC operation.
Data flow in each direction is controlled by
output-enable (OEAB and OEBA) and
clock-enable (CLKENAB and CLKENBA) inputs.
For the A-to-B data flow, the data flows through a
single register. The B-to-A data can flow through
a four-stage pipeline register path, or through a
single register path, depending on the state of the
select (SEL) input.
Data is stored in the internal registers on the
low-to-high transition of the clock (CLK) input,
provided that the appropriate CLKEN inputs are
low. The A-to-B data transfer is synchronized to
the CLKAB input, and B-to-A data transfer is
synchronized with the CLK1BA and CLK2BA
inputs.
DGG OR DL PACKAGE
(TOP VIEW)
CLKENAB 1
OEAB 2
A1 3
GND 4
A2 5
A3 6
V_CC 7
A4 8
A5 9
A6 10
GND 11
A7 12
A8 13
A9 14
A10 15
A11 16
A12 17
GND 18
A13 19
A14 20
A15 21
V_CC 22
A16 23
A17 24
GND 25
A18 26
OEBA 27
CLKENBA 28
56 SEL
55 CLKAB
54 B1
53 GND
52 B2
51 B3
50 V_CC
49 B4
48 B5
47 B6
46 GND
45 B7
44 B8
43 B9
42 B10
41 B11
40 B12
39 GND
38 B13
37 B14
36 B15
35 V_CC
34 B16
33 B17
32 GND
31 B18
30 CLK1BA
29 CLK2BA
To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16525 is characterized for operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1999, Texas Instruments Incorporated
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