SN74ALVC7814 Datasheet, PDF (1/11 Pages) Texas Instruments – 64 × 18 LOW-POWER FIRST-IN, FIRST-OUT MEMORY

SN74ALVC7814
64 × 18
LOW-POWER FIRST-IN, FIRST-OUT MEMORY
SCAS592A – OCTOBER 1997 – REVISED APRIL 1998
D Member of the Texas Instruments
Widebus™ Family
D Low-Power Advanced CMOS Technology
D Operates From 3-V to 3.6-V V_CC
D Load Clock and Unload Clock Can Be
Asynchronous or Coincident
D Full, Empty, and Half-Full Flags
D Programmable Almost-Full/Almost-Empty
Flag
D Fast Access Times of 18 ns With a 50-pF
Load and All Data Outputs Switching
Simultaneously
D Data Rates up to 40 MHz
D 3-State Outputs
D Pin-to-Pin Compatible With SN74ACT7804,
SN74ACT7806, and SN74ACT7814
D Packaged in Shrink Small-Outline 300-mil
Package Using 25-mil Center-to-Center
Spacing
description
A FIFO memory is a storage device that allows
data to be written into and read from its array at
independent data rates. The SN74ALVC7814 is
an 18-bit FIFO with high speed and fast access
times. Data is processed at rates up to 40 MHz
with access times of 18 ns in a bit-parallel format.
These memories are designed for 3-V to 3.6-V
V_CC operation.
Data is written into memory on a low-to-high
transition of the load clock (LDCK) and is read out
on a low-to-high transition of the unload clock
(UNCK). The memory is full when the number of
words clocked in exceeds the number of words
clocked out by 64. When the memory is full, LDCK
has no effect on the data residing in memory.
When the memory is empty, UNCK has no effect.
DL PACKAGE
(TOP VIEW)
RESET 1
D17 2
D16 3
D15 4
D14 5
D13 6
D12 7
D11 8
D10 9
V_CC 10
D9 11
D8 12
GND 13
D7 14
D6 15
D5 16
D4 17
D3 18
D2 19
D1 20
D0 21
HF 22
PEN 23
AF/AE 24
LDCK 25
NC 26
NC 27
FULL 28
56 OE
55 Q17
54 Q16
53 Q15
52 GND
51 Q14
50 V_CC
49 Q13
48 Q12
47 Q11
46 Q10
45 Q9
44 GND
43 Q8
42 Q7
41 Q6
40 Q5
39 V_CC
38 Q4
37 Q3
36 Q2
35 GND
34 Q1
33 Q0
32 UNCK
31 NC
30 NC
29 EMPTY
NC – No internal connection
Status of the FIFO memory is monitored by the full (FULL), empty (EMPTY), half-full (HF), and almost-
full/almost-empty (AF/AE) flags. The FULL output is low when the memory is full and high when the memory
is not full. The EMPTY output is low when the memory is empty and high when it is not empty. The HF output
is high whenever the FIFO contains 32 or more words and low when it contains 31 or fewer words. The AF/AE
status flag is a programmable flag. The first one or two low-to-high transitions of LDCK after reset are used to
program the almost-empty offset value (X) and the almost-full offset value (Y) if program enable (PEN) is low.
The AF/AE flag is high when the FIFO contains X or fewer words or (64 – Y) or more words. The AF/AE flag
is low when the FIFO contains between (X + 1) and (63 – Y) words.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright © 1998, Texas Instruments Incorporated
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