SN74ALVC32_07 Datasheet, PDF (1/13 Pages) Texas Instruments – QUADRUPLE 2-INPUT POSITIVE-OR GATE

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FEATURES
• Operates From 1.65 V to 3.6 V
• Max t_pd of 2.8 ns at 3.3 V
• ±24-mA Output Drive at 3.3 V
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN74ALVC32
QUADRUPLE 2-INPUT POSITIVE-OR GATE
SCES108G – JULY 1997 – REVISED NOVEMBER 2004
D, DGV, NS, OR PW PACKAGE
(TOP VIEW)
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
14 V_CC
13 4B
12 4A
11 4Y
10 3B
9 3A
8 3Y
DESCRIPTION/ORDERING INFORMATION
This quadruple 2-input positive-OR gate is designed for 1.65-V to 3.6-V V_CC operation.
The SN74ALVC32 performs the Boolean function Y = ^{A ⋅ B} or Y = A + B in positive logic.
T_A
-40°C to 85°C
ORDERING INFORMATION
PACKAGE ⁽¹⁾
ORDERABLE PART NUMBER
SOIC - D
Tube
Tape and reel
SN74ALVC32D
SN74ALVC32DR
SOP - NS
Tape and reel
SN74ALVC32NSR
TSSOP - PW
Tube
Tape and reel
SN74ALVC32PW
SN74ALVC32PWR
TVSOP - DGV
Tape and reel
SN74ALVC32DGVR
TOP-SIDE MARKING
ALVC32
ALVC32
VA32
VA32
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
A
B
H
X
X
H
L
L
OUTPUT
Y
H
H
L
LOGIC DIAGRAM, EACH GATE (POSITIVE LOGIC)
A
Y
B
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1997–2004, Texas Instruments Incorporated