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SN74ALS992 Datasheet, PDF (1/6 Pages) Texas Instruments – 9-BIT D-TYPE TRANSPARENT READ-BACK LATCH WITH 3-STATE OUTPUTS
SN74ALS992
9-BIT D-TYPE TRANSPARENT READ-BACK LATCH
WITH 3-STATE OUTPUTS
SDAS028B – APRIL 1984 – REVISED JANUARY 1995
• 3-State I/O-Type Read-Back Inputs
• Bus-Structured Pinout
• True Logic Outputs
• Designed With Nine Bits for Parity
Applications
• Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic (NT) 300-mil DIPs
description
This 9-bit latch is designed specifically for storing
the contents of the input data bus and providing
the capability of reading back the stored data onto
the input data bus. In addition, this device provides
a 3-state buffer-type output and is easily
implemented in parity applications.
DW OR NT PACKAGE
(TOP VIEW)
OERB 1
1D 2
2D 3
3D 4
4D 5
5D 6
6D 7
7D 8
8D 9
9D 10
CLR 11
GND 12
24 VCC
23 1Q
22 2Q
21 3Q
20 4Q
19 5Q
18 6Q
17 7Q
16 8Q
15 9Q
14 OEQ
13 LE
The nine latches are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow
the data (D) inputs. The Q outputs are in the 3-state condition when the output-enable (OEQ) input is high.
Read back is provided through the output-enable (OERB) input. When OERB is taken low, the data present at
the output of the data latches is allowed to pass back onto the input data bus. When OERB is taken high, the
output of the data latches is isolated from the D inputs. OERB does not affect the internal operation of the latches;
however, precautions should be taken not to create a bus conflict.
The SN74ALS992 is characterized for operation from 0°C to 70°C.
logic symbol†
14
OEQ
1
OERB
11
CLR
13
LE
2
1D
3
2D
4
3D
5
4D
6
5D
7
6D
8
7D
9
8D
10
9D
EN3
EN2
R
C1
1D
2
3
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
23
1Q
22
2Q
21
3Q
20
4Q
19
5Q
18
6Q
17
7Q
16
8Q
15
9Q
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright © 1995, Texas Instruments Incorporated
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