SN74ALS259DR Datasheet, PDF (1/17 Pages) Texas Instruments – 8-BIT ADDRESSABLE LATCHES

• 8-Bit Parallel-Out Storage Register
Performs Serial-to-Parallel Conversion With
Storage
• Asynchronous Parallel Clear
• Active-High Decoder
• Enable/Disable Input Simplifies Expansion
• Expandable for n-Bit Applications
• Four Distinct Functional Modes
• Package Options Include Plastic
Small-Outline (D) Packages, Ceramic Chip
Carriers (FK), and Standard Plastic (N) and
Ceramic (J) 300-mil DIPs
description
SN54ALS259, SN74ALS259
8ĆBIT ADDRESSABLE LATCHES
ą
SDAS217A − DECEMBER 1982 − REVISED DECEMBER 1994
SN54ALS259 . . . J PACKAGE
SN74ALS259 . . . D OR N PACKAGE
(TOP VIEW)
S0 1
S1 2
S2 3
Q0 4
Q1 5
Q2 6
Q3 7
GND 8
16 V_CC
15 CLR
14 G
13 D
12 Q7
11 Q6
10 Q5
9 Q4
SN54ALS259 . . . FK PACKAGE
(TOP VIEW)
These 8-bit addressable latches are designed for
general-purpose storage applications in digital
systems. Specific uses include working registers,
serial-holding registers, and active-high decoders
or demultiplexers. They are multifunctional
devices capable of storing single-line data in eight
addressable latches and being a 1-of-8 decoder or
demultiplexer with active-high outputs.
3 2 1 20 19
S2 4
18 G
Q0 5
17 D
NC 6
16 NC
Q1 7
15 Q7
Q2 8
14 _Q6
9 10 11 12 13
Four distinct modes of operation are selectable by
controlling the clear (CLR) and enable (G) inputs
as shown in the function table. In the
addressable-latch mode, data at the data-in
NC − No internal connection
terminal is written into the addressed latch. The
addressed latch follows the data input with all unaddressed latches remaining in their previous states. In the
memory mode, all latches remain in their previous states and are unaffected by the data or address inputs. To
eliminate the possibility of entering erroneous data in the latches, G should be held high (inactive) while the
address lines are changing. In the 1-of-8 decoding or demultiplexing mode, the addressed output follows the
level of the D input with all other outputs low. In the clear mode, all outputs are low and unaffected by the address
and data inputs.
The SN54ALS259 is characterized for operation over the full military temperature range of −55°C to 125°C. The
SN74ALS259 is characterized for operation from 0°C to 70°C.
Function Tables
FUNCTION
INPUTS
CLR G
OUTPUT OF EACH
ADDRESSED OTHER
LATCH
OUTPUT
FUNCTION
H
L
D
H
H
QiO
L
L
D
QiO
Addressable latch
QiO
Memory
L
8-line demultiplexer
L
H
L
L
Clear
D = the level at the data input.
QiO = the level of Qi (i = Q, 1, . . . 7 as appropriate) before the indicated
steady-state input conditions were established.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright  1994, Texas Instruments Incorporated
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