SN74ALS229B Datasheet, PDF (1/12 Pages) Texas Instruments – 16 × 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY

SN74ALS229B
16 × 5 ASYNCHRONOUS FIRST-IN, FIRST-OUT MEMORY
D Independent Asychronous Inputs and
Outputs
D 16 Words by 5 Bits
D Data Rates From 0 to 40 MHz
D Fall-Through Time . . . 14 ns Typ
D 3-State Outputs
D Package Options Include Plastic
Small-Outline Packages (DW), Plastic Chip
Carriers (FN), and Standard Plastic 300-mil
DIPs (N)
description
SDAS090 – MARCH 1990 – REVISED JUNE 1992
DW OR N PACKAGE
(TOP VIEW)
OE ₁
FULL–2 ₂
FULL 3
LDCK 4
D0 5
D1 6
D2 7
D3 8
D4 9
GND 10
20 ^V_CC
19 ^EMPTY+2
18 UNCK
17 EMPTY
16 Q0
15 Q1
14 Q2
13 Q3
12 Q4
11 RST
This 80-bit memory uses advanced low-power
Schottky technology and features high speed and
fast fall-through times. It is organized as 16 words
by 5 bits.
FN PACKAGE
(TOP VIEW)
A FIFO memory is a storage device that allows
data to be written into and read from its array at
independent data rates. This FIFO is designed to
process data at rates from 0 to 40 MHz in a
bit-parallel format, word by word.
Data is written into memory on a low-to-high
transition at the load clock (LDCK) input and is
read out on a low-to-high transition at the unload
clock (UNCK). The memory is full when the
number of words clocked in exceeds by 16 the
number of words clocked out. When the memory
is full, LDCK signals have no effect. When the
memory is empty, UNCK signals have no effect.
LDCK
D0
D1
D2
D3
3 2 1 20 19
4
18
5
17
6
16
7
15
8
14
9 10 11 12 13
UNCK
EMPTY
Q0
Q1
Q2
Status of the FIFO memory is monitored by the FULL, EMPTY, FULL–2, and FULL+2 output flags. The FULL
output is low when the memory is full and high when it is not full. The FULL–2 output is low when the memory
contains 14 data words. The EMPTY output is low when the memory is empty and high when it is not empty.
The EMPTY+2 output is low when two words remain in memory.
A low level on the reset (RST) input resets the internal stack control pointers and also sets EMPTY low and sets
FULL, FULL–2, and EMPTY+2 high. The Q outputs are not reset to any specific logic level. The first low-to-high
transition on LDCK after either a RST pulse or from an empty condition causes EMPTY to go high and the data
to appear on the Q outputs. It is important to note that the first word does not have to be unloaded. Data outputs
are noninverting with respect to the data inputs and are at high impedance when the output-enable (OE) input
is low. OE does not affect the output flags. Cascading is easily accomplished in the word-width direction but is
not possible in the word-depth direction.
The SN74ALS229B is characterized for operation from 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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Copyright © 1992, Texas Instruments Incorporated
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